Datasheet

DS12110 Rev 5 81/231

STM32H743xI Pin descriptions

3. This ball should not remain floating. It can be connected to VSS or VDD. It is reserved for future use.

4. This ball should be connected to V

5. Pxy_C and Pxy pins/balls are two separate pads (analog switch open). The analog switch is configured through a SYSCFG

6. There is a direct path between Pxy_C and Pxy pins/balls, through an analog switch. Pxy alternate functions are available on

Pxy_C when the analog switch is closed. The analog switch is configured through a SYSCFG register. Refer to the product

reference manual for a detailed description of the switch configuration bits.

7. VREF+ pin, and consequently the internal voltage reference, are not available on the TFBGA100 package. On this package,

this pin is double-bonded to VDDA which can be connected to an external reference. The internal voltage reference buffer is

not available and must be kept disabled