Datasheet
DS12110 Rev 5 63/231
STM32H743xI Pin descriptions
95
31 K3 43 J6 R3 53 56 R5 PA7 I/O TT_a -
TIM1_CH1N, TIM3_CH2,
TIM8_CH1N,
SPI1_MOSI/I2S1_SDO,
SPI6_MOSI, TIM14_CH1,
ETH_MII_RX_DV/ETH_R
MII_CRS_DV,
FMC_SDNWE,
EVENTOUT
ADC12_INN3,
ADC12_INP7,
OPAMP1_VINM
32 G4 44 K6 N5 54 57 T4 PC4 I/O TT_a -
DFSDM_CKIN2,
I2S1_MCK,
SPDIFRX_IN2,
ETH_MII_RXD0/ETH_R
MII_RXD0, FMC_SDNE0,
EVENTOUT
ADC12_INP4,
OPAMP1_
VOUT,
COMP_1_INM
33 H4 45 N5 P5 55 58 U4 PC5 I/O TT_a -
SAI1_D3,
DFSDM_DATIN2,
SPDIFRX_IN3, SAI4_D3,
ETH_MII_RXD1/ETH_R
MII_RXD1,
FMC_SDCKE0,
COMP_1_OUT,
EVENTOUT
ADC12_INN4,
ADC12_INP8,
OPAMP1_
VINM
-- -N4- -59G13VDD S -- - -
- - - H12 J9 - 60 G16 VSS S - - - -
34 J4 46 M5 R5 56 61 U5 PB0 I/O FT_a -
TIM1_CH2N, TIM3_CH3,
TIM8_CH2N,
DFSDM_CKOUT,
UART4_CTS, LCD_R3,
OTG_HS_ULPI_D1,
ETH_MII_RXD2,
LCD_G1, EVENTOUT
ADC12_INN5,
ADC12_INP9,
OPAMP1_VINP,
COMP_1_INP
35 K4 47 L5 R4 57 62 T5 PB1 I/O TT_u -
TIM1_CH3N, TIM3_CH4,
TIM8_CH3N,
DFSDM_DATIN1,
LCD_R6,
OTG_HS_ULPI_D2,
ETH_MII_RXD3,
LCD_G0, EVENTOUT
ADC12_INP5,
COMP_1_INM
36 G5 48 L6 M6 58 63 R6 PB2 I/O
FT_
ha
-
SAI1_D1,
DFSDM_CKIN1,
SAI1_SD_A,
SPI3_MOSI/I2S3_SDO,
SAI4_SD_A,
QUADSPI_CLK,
SAI4_D1, EVENTOUT
COMP_1_INP,
RTC_OUT
Table 8. STM32H743xI pin/ball definition (continued)
Pin/ball name
Pin name
(function
after
reset)
Pin type
I/O structure
Notes
Alternate functions
Additional
functions
LQFP100
TFBGA100
LQFP144
UFBGA169
UFBGA176+25
LQFP176
LQFP208
TFBGA240 +25