Datasheet

DS12110 Rev 5 61/231
STM32H743xI Pin descriptions
95
22 G2 34 J5 N3 40 43 N5
(5)
PA0 I/O FT_a -
TIM2_CH1/TIM2_ETR,
TIM5_CH1, TIM8_ETR,
TIM15_BKIN,
USART2_CTS_NSS,
UART4_TX,
SDMMC2_CMD,
SAI2_SD_B,
ETH_MII_CRS,
EVENTOUT
ADC1_INP16,
WKUP0
-- - - - - -T1
(5)
PA0_C ANA TT_a - -
ADC12_INN1,
ADC12_INP0
23 H2 35 K4 N2 41 44 N4
(5)
PA1 I/O
FT_
ha
-
TIM2_CH2, TIM5_CH2,
LPTIM3_OUT,
TIM15_CH1N,
USART2_RTS,
UART4_RX,
QUADSPI_BK1_IO3,
SAI2_MCK_B,
ETH_MII_RX_CLK/ETH_
RMII_REF_CLK,
LCD_R2, EVENTOUT
ADC1_INN16,
ADC1_INP17
-- - - - - -T2
(5)
PA1_C ANA TT_a - - ADC12_INP1
24 J2 36 N1 P2 42 45 N3 PA2 I/O FT_a -
TIM2_CH3, TIM5_CH3,
LPTIM4_OUT,
TIM15_CH1,
USART2_TX,
SAI2_SCK_B,
ETH_MDIO,
MDIOS_MDIO, LCD_R1,
EVENTOUT
ADC12_INP14,
WKUP1
- - - N2F44346N2 PH2 I/O
FT_
ha
-
LPTIM1_IN2,
QUADSPI_BK2_IO0,
SAI2_SCK_B,
ETH_MII_CRS,
FMC_SDCKE0, LCD_R0,
EVENTOUT
ADC3_INP13
-K1 - M1 - - - F5 VDD S - - - -
- J1 - M7 J8 - - C16 VSS S - - - -
-- -M3G44447P2 PH3 I/O
FT_
ha
-
QUADSPI_BK2_IO1,
SAI2_MCK_B,
ETH_MII_COL,
FMC_SDNE0, LCD_R1,
EVENTOUT
ADC3_INN13,
ADC3_INP14
Table 8. STM32H743xI pin/ball definition (continued)
Pin/ball name
Pin name
(function
after
reset)
Pin type
I/O structure
Notes
Alternate functions
Additional
functions
LQFP100
TFBGA100
LQFP144
UFBGA169
UFBGA176+25
LQFP176 LQFP208
TFBGA240 +25