Datasheet

Functional overview STM32H743xI
20/231 DS12110 Rev 5
Error code correction (ECC)
Over the product lifetime, and/or due to external events such as radiations, invalid bits in
memories may occur. They can be detected and corrected by ECC. This is an expected
behavior that has to be managed at final-application software level in order to ensure data
integrity through ECC algorithms implementation.
SRAM data are protected by ECC:
 7 ECC bit
s are added per 32-bit word.
 8 ECC bits are added per 64-bit word for AXI-SRAM and ITCM-RAM.
The ECC mechanism is based on the SECDED algor
ithm. It supports single-error correction
and double-error detection.
3.4 Boot modes
At startup, the boot memory space is selected by the BOOT pin and BOOT_ADDx option
bytes, allowing to program any boot memory address from 0x0000 0000 to 0x3FFF FFFF
which includes:
 All Flash ad
dress space
 All RAM address space: ITCM, DTCM RAMs and SRAMs
 The System memory bootloader
The boot loader is located in non-user System me
mory. It is used to reprogram the Flash
memory through a serial interface (USART, I2C, SPI, USB-DFU). Refer to STM32
microcontroller System memory Boot mode application note (AN2606) for details.
3.5 Power supply management
3.5.1 Power supply scheme
STM32H743xI power supply voltages are the following:
 V
DD
= 1.62 to 3.6 V: external power supply for I/Os, provided externally through V
DD
pins.
 V
DDLDO
= 1.62 to 3.6 V: supply voltage for the internal regulator supplying V
CORE
 V
DDA
= 1.62 to 3.6 V: external analog power supplies for ADC, DAC, COMP and
OPAMP.
 V
DD33USB and
V
DD50USB
:
V
DD50USB
can be supplied through the USB cable to generate the V
DD33USB
via the
USB internal regulator. This allows supporting a V
DD
supply different from 3.3 V.
The USB regulator can be bypassed to supply directly V
DD33USB
if V
DD
= 3.3 V.
 V
BAT
= 1.2 to 3.6 V: power supply for the V
SW
domain when V
DD
is not present.
 V
CAP
: V
CORE
supply voltage, which values depend on voltage scaling (0.7 V, 0.9 V,
1.0 V, 1.1 V or 1.2 V). They are configured through VOS bits in PWR_D3CR register.