Datasheet

DS12110 Rev 5 19/231

STM32H743xI Functional overview

3.3 Memories

3.3.1 Embedded Flash memory

The STM32H743xI devices embed up to 2 Mbytes of Flash memory that can be used for

storing programs and data.

The Flash memory is organized as 266-bit Flash words memory that can be used for storing

oth code and data constants. Each word consists of:

 On

e Flash word (8 words, 32 bytes or 256 bits)

 10 ECC bits.

The Flash memory is divided into two independe

nt banks. Each bank is organized as

follows:

• A

1-Mbyte user Flash memory block containing eight user sectors of

128 Kbytes(4 K Flash words)

• 128 Kbytes of System Flash memory from which the device can boot

 2 Kbytes (64 Flash words) of user option bytes for user configuration

3.3.2 Embedded SRAM

All devices feature:

 5

12 Kbytes of AXI-SRAM mapped onto AXI bus on D1 domain.

 SRAM1 mapped on D2 domain: 128 Kbytes

 SRAM2 mapped on D2 domain: 128 Kbytes

 SRAM3 mapped on D2 domain: 32 Kbytes

 SRAM4 mapped on D3 domain: 64 Kbytes

 4 Kbytes of backup SRAM

The content of this area is protected against possible unwanted write accesses,

and is retained in Standby or V

BAT

mode.

 RAM mapped to TCM interface (ITCM and DTCM):

Both ITCM and DTCM RAMs are 0 wait state memories. either They can be accessed

either from the CPU or the MDMA (even in Sleep mode) through a specific AHB slave

of the CPU(AHBP):

– 64 Kbytes of ITCM-RAM (instruction RAM)

This RAM is connected to ITCM 64-bit interface designed for execution of critical

real-times routines by the CPU.

– 128 Kbytes of DTCM-RAM (2x 64-Kbyte DTCM-RAMs on 2x32-bit DTCM ports)

The DTCM-RAM could be used for critical real-time data, such as interrupt service

routines or stack/heap memory. Both DTCM-RAMs can be used in parallel (for

load/store operations) thanks to the Cortex

-M7 dual issue capability.

The MDMA can be used to load code or data in ITCM or DTCM RAMs.