Datasheet

DS12110 Rev 5 187/231
STM32H743xI Electrical characteristics
199
I
2
S interface characteristics
Unless otherwise specified, the parameters given in Table 104 for the I
2
S interface are
derived from tests performed under the ambient temperature, f
PCLKx
frequency and V
DD
supply voltage conditions summarized in Table 23: General operating conditions, with the
following configuration:
 Output speed
is set to OSPEEDRy[1:0] = 10
 Capacitive load C = 30 pF
 Measurement points are done at CMOS levels: 0.5V
DD
 I/O compensation cell enabled
Refer to Section 6.3.15: I/O port characteristics for more details on the input/output alternate
function characteristics (CK, SD, WS).
Table 104. I
2
S dynamic characteristics
(1)
Symbol Parameter Conditions Min Max Unit
f
MCK
I2S Main clock output - 256x8K 256xFs MHz
f
CK
I2S clock frequency
Master data - 64xFs
MHz
Slave data - 64xFs
t
v(WS)
WS valid time Master mode - 3.5
ns
t
h(WS)
WS hold time Master mode 0 -
t
su(WS)
WS setup time Slave mode 1 -
t
h(WS)
WS hold time Slave mode 1 -
t
su(SD_MR)
Data input setup time
Master receiver 1 -
t
su(SD_SR)
Slave receiver 1 -
t
h(SD_MR)
Data input hold time
Master receiver 4 -
t
h(SD_SR)
Slave receiver 2 -
t
v(SD_ST)
Data output valid time
Slave transmitter (after enable edge) - 20
t
v(SD_MT)
Master transmitter (after enable edge) - 3
t
h(SD_ST)
Data output hold time
Slave transmitter (after enable edge) 9 -
t
h(SD_MT)
Master transmitter (after enable edge) 0 -
1. Guaranteed by characterization results.