Datasheet

Electrical characteristics STM32H743xI
180/231 DS12110 Rev 5
6.3.30 LCD-TFT controller (LTDC) characteristics
Unless otherwise specified, the parameters given in Table 99 for LCD-TFT are derived from
tests performed under the ambient temperature, f
rcc_c_ck
frequency and V
DD
supply voltage
summarized in Table 23: General operating conditions, with the following configuration:
 LCD_CLK polari
ty: high
 LCD_DE polarity: low
 LCD_VSYNC and LCD_HSYNC polarity: high
 Pixel formats: 24 bits
 Output speed is set to OSPEEDRy[1:0] = 11
 Capacitive load C=30 pF
 Measurement points are done at CMOS levels: 0.5V
DD
 I/O compensation cell enabled
Table 99. LTDC characteristics
(1)
Symbol Parameter Conditions Min Max Unit
f
CLK
LTDC clock output frequency
2.7 V < V
DD
< 3.6 V,
20 pF
-150
MHz
2.7 V < V
DD
< 3.6 V - 133
1.62 V < V
DD
< 3.6 V - 90
D
CLK
LTDC clock output duty cycle - 45 55 %
t
w(CLKH),
t
w(CLKL)
Clock High time, low time t
w(CLK)
/20.5 t
w(CLK)
/2+0.5
ns
t
v(DATA)
Data output valid time - 0.5
t
h(DATA)
Data output hold time 0 -
t
v(HSYNC),
t
v(VSYNC),
t
v(DE)
HSYNC/VSYNC/DE output valid
time
-0.5
t
h(HSYNC),
t
h(VSYNC)
,
t
h(DE)
HSYNC/VSYNC/DE output hold
time
0.5 -
1. Guaranteed by characterization results.