Datasheet

DS12110 Rev 5 145/231
STM32H743xI Electrical characteristics
199
Synchronous waveforms and timings
Figure 27 through Figure 30 represent synchronous waveforms and Table 72 through
Table 75 provide the corresponding timing
s. The results shown in these tables are obtained
with the following FMC co
nfiguration:
 Bu
rstAccessMode = FMC_BurstAccessMode_Enable
 MemoryType = FMC_MemoryType_CRAM
 WriteBurst = FMC_WriteBurst_Enable
 CLKDivision = 1
 DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM
In all the timing tables, the
T
fmc_ker_ck
is the fmc_ker_ck clock period, with the following
FMC_CLK maximum values:
 For
2.7 V<V
DD
<3.6 V, FMC_CLK =133 MHz at 20 pF
 For 1.8 V<V
DD
<1.9 V, FMC_CLK =100 MHz at 20 pF
 For 1.62 V<V
DD
<1.8 V, FMC_CLK =100 MHz at 15 pF
Table 71. Asynchronous multiplexed PSRAM/NOR write-NWAIT timings
(1)
Symbol Parameter Min Max Unit
t
w(NE)
FMC_NE low time 9T
fmc_ker_ck
– 1 9T
fmc_ker_ck
ns
t
w(NWE)
FMC_NWE low time 7T
fmc_ker_ck
– 0.5 7T
fmc_ker_ck
+ 0.5
t
su(NWAIT_NE)
FMC_NWAIT valid before FMC_NEx high 6T
fmc_ker_ck
+ 3 -
t
h(NE_NWAIT)
FMC_NEx hold time after FMC_NWAIT invalid 4T
fmc_ker_ck
-
1. Guaranteed by characterization results.