Datasheet

DS12110 Rev 5 143/231
STM32H743xI Electrical characteristics
199
Table 68. Asynchronous multiplexed PSRAM/NOR read timings
(1)
Symbol Parameter Min Max Unit
t
w(NE)
FMC_NE low time 3T
fmc_ker_ck
− 13T
fmc_ker_ck
+ 1
ns
t
v(NOE_NE)
FMC_NEx low to FMC_NOE low 2T
fmc_ker_ck
2T
fmc_ker_ck
+ 0.5
t
tw(NOE)
FMC_NOE low time T
fmc_ker_ck
− 1T
fmc_ker_ck
+ 1
t
h(NE_NOE)
FMC_NOE high to FMC_NE high hold time 0 -
t
v(A_NE)
FMC_NEx low to FMC_A valid - 0.5
t
v(NADV_NE)
FMC_NEx low to FMC_NADV low 0 0.5
t
w(NADV)
FMC_NADV low time T
fmc_ker_ck
− 0.5 T
fmc_ker_ck
+1
t
h(AD_NADV)
FMC_AD(address) valid hold time after
FMC_NADV high
T
fmc_ker_ck
+ 0.5 -
t
h(A_NOE)
Address hold time after FMC_NOE high T
fmc_ker_ck
− 0.5 -
t
h(BL_NOE)
FMC_BL time after FMC_NOE high 0 -
t
v(BL_NE)
FMC_NEx low to FMC_BL valid - 0.5
t
su(Data_NE)
Data to FMC_NEx high setup time T
fmc_ker_ck
− 2 -
t
su(Data_NOE)
Data to FMC_NOE high setup time T
fmc_ker_ck
− 2 -
t
h(Data_NE)
Data hold time after FMC_NEx high 0 -
t
h(Data_NOE)
Data hold time after FMC_NOE high 0 -
1. Guaranteed by characterization results.
Table 69. Asynchronous multiplexed PSRAM/NOR read-NWAIT timings
(1)
Symbol Parameter Min Max Unit
t
w(NE)
FMC_NE low time 8T
fmc_ker_ck
− 18T
fmc_ker_ck
ns
t
w(NOE)
FMC_NWE low time 5T
fmc_ker_ck
− 1.5 5T
fmc_ker_ck
+ 0.5
t
su(NWAIT_NE)
FMC_NWAIT valid before FMC_NEx high 5T
fmc_ker_ck
+ 3 -
t
h(NE_NWAIT)
FMC_NEx hold time after FMC_NWAIT
invalid
4T
fmc_ker_ck
-
1. Guaranteed by characterization results.