Datasheet

Electrical characteristics STM32H743xI
142/231 DS12110 Rev 5
Figure 25. Asynchronous multiplexed PSRAM/NOR read waveforms
Table 67. Asynchronous non-multiplexed SRAM/PSRAM/NOR write - NWAIT timings
(1)(2)
Symbol Parameter Min Max Unit
t
w(NE)
FMC_NE low time 8T
fmc_ker_ck
− 1 8T
fmc_ker_ck
+ 1
ns
t
w(NWE)
FMC_NWE low time 6T
fmc_ker_ck
− 1.5 6T
fmc_ker_ck
+ 0.5
t
su(NWAIT_NE)
FMC_NWAIT valid before FMC_NEx high 5T
fmc_ker_ck
+ 13 -
t
h(NE_NWAIT)
FMC_NEx hold time after FMC_NWAIT invalid 4T
fmc_ker_ck
+ 13 -
1. Guaranteed by characterization results.
2. N
WAIT
pulse width is equal to 1 AHB cycle.
1%/
'DWD
)0&B 1%/>@
)0&B $'>@
W
Y%/B1(
W
K'DWDB1(
$GGUHVV
)0&B $>@
W
Y$B1(
)0&B1:(
W
Y$B1(
069
$GGUHVV
)0&B1$'9
W
Y1$'9B1(
W
Z1$'9
W
VX'DWDB1(
W
K$'B1$'9
)0&B 1(
)0&B12(
W
Z1(
W
Z12(
W
Y12(B1(
W
K1(B12(
W
K$B12(
W
K%/B12(
W
VX'DWDB12(
W
K'DWDB12(
)0&B1:$,7
WVX1:$,7B1(
WK1(B1:$,7