Datasheet

This is information on a product in full production.
July 2018 DS12110 Rev 5 1/231
STM32H743xI
32-bit Arm
®
Cortex
®
-M7 400MHz MCUs, up to 2MB Flash,
1MB RAM, 46 com. and analog interfaces
Datasheet - production data
Features
Core
32-bit Arm
®
Cortex
®
-M7 core with double-
precision FPU and L1 cache: 16 Kbytes of data
and 16 Kbytes of instruction cache; frequency
up to 400 MHz, MPU, 856 DMIPS/
2.14 DMIPS/MHz (Dhrystone 2.1), and DSP
instructions
Memories
Up to 2 Mbytes of Flash memory with read-
while-write support
1 Mbyte of RAM: 192 Kbytes of TCM RAM (inc.
64 Kbytes of ITCM RAM + 128 Kbytes of
DTCM RAM for time critical routines),
864 Kbytes of user SRAM, and 4 Kbytes of
SRAM in Backup domain
Dual mode Quad-SPI memory interface
running up to 133 MHz
Flexible external memory controller with up to
32-bit data bus: SRAM, PSRAM,
SDRAM/LPSDR SDRAM, NOR/NAND Flash
memory clocked up to 133 MHz in
Synchronous mode
CRC calculation unit
Security
ROP, PC-ROP, active tamper
General-purpose input/outputs
Up to 168 I/O ports with interrupt capability
Reset and power management
3 separate power domains which can be
independently clock-gated or switched off:
D1: high-performance capabilities
D2: communication peripherals and timers
D3: reset/clock control/power management
1.62 to 3.6 V application supply and I/Os
POR, PDR, PVD and BOR
Dedicated USB power embedding a 3.3 V
internal regulator to supply the internal PHYs
Embedded regulator (LDO) with configurable
scalable output to supply the digital circuitry
Voltage scaling in Run and Stop mode (5
configurable ranges)
Backup regulator (~0.9 V)
Voltage reference for analog peripheral/V
REF+
Low-power modes: Sleep, Stop, Standby and
V
BAT
supporting battery charging
Low-power consumption
Total current consumption down to 4
µA
Clock management
Internal oscillators: 64 MHz HSI, 48 MHz
HSI48, 4 MHz CSI, 32 kHz LSI
External oscillators: 4-48 MHz HSE,
32.768 kHz LSE
3× PLLs (1 for the system clock, 2 for kernel
clocks) with Fractional mode
Interconnect matrix
3 bus matrices (1 AXI and 2 AHB)
Bridges (5× AHB2-APB, 2× AXI2-AHB)
)%*$
LQFP208
(28x28 mm)
LQFP176
(24x24 mm)
LQFP144
(20x20 mm)
LQFP100
(14x14 mm)
UFBGA176+25 (10x10 mm)
UFBGA169 (7x7 mm)
)%*$
TFBGA240+25 (14x14 mm)
TFBGA100 (8x8 mm)
(1)
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Summary of content (231 pages)