Data Sheet

O
mni
TM
ision
DESCRIPTION OF CHANGES (CONTINUED)
• In Table 6 on page 19, changed description of register DSP_Ctrl4 (0x67) from:
DSP Control Byte 4
to:
DSP Control Byte 4
Bit[7:3]: Reserved
Bit[2]: AEC selection
0: Before gamma
1: After gamma
Bit[1:0]: Output selection
00: YUV or RGB
01: YUV or RGB
10: RAW8
11: RAW10
• In Table 6 on page 20, changed description of register AWBCtrl1 (0x69) from:
AWB Control 1
to:
AWB Control 1
Bit[7:4]: Reserved
Bit[3]: G gain enable
0: AWB adjusts R and G gain
1: AWB adjusts R, G, and B gain
Bit[2]: Max color gain
0: Max color gain is 2x
1: Max color gain is 4x
Bit[1]: Reserved
Bit[0]: AWB mode select
0: Advanced AWB mode
1: Normal AWB mode
• In Table 6 on page 21, changed description of register EDGE0 (0x8F) from:
Edge Enhancement Control 0
Bit[7:5]: Reserved
Bit[4:0]: Edge enhancement strength control
to
Sharpness (Edge Enhancement) Control 0
Bit[7:5]: Reserved
Bit[4:0]: Sharpness (edge enhancement) strength control
• In Table 6 on page 21, changed description of register EDGE1 (0x90) from:
Edge Enhancement Control 1
Bit[7:4]: Reserved
Bit[3:0]: Edge enhancement threshold control
to:
Sharpness (Edge Enhancement) Control 1
Bit[7:4]: Reserved
Bit[3:0]: Sharpness (edge enhancement) threshold detection
• In Table 6 on page 21, changed description of register 0x92 from “Edge Enhancement
Strength Low Point Control” to “Sharpness (Edge Enhancement) Strength Upper Limit”