Data Sheet

NC7SB3157, FSA3157 — Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch
AC Loading and Waveforms
Figure 12. AC Test Circuit
Figure 13. AC Waveforms
Figure 14. Break-Before-Make Interval Timing
V
I
RU
RD
FROM
OUTPUT
UNDER
TEST
C
L
Notes:
Input driven by 50Ω source terminated in 50Ω
C
L
includes load and stray capacitance
Input PRR = 1.0 MHz; t
W
= 500 ns
t
r
= 2.5ns
t
r
= 2.5ns t
r
= 2.5ns
t
r
= 2.5ns
t
W
t
PLH
t
PHL
t
PZL
t
PZH
t
PHZ
t
PLZ
V
CC
V
CC
V
TRI
V
TRI
V
OH
V
OL
V
OL
+0.3V
V
OL
V
OH
–0.3V
V
OH
GND
GND
50%50%
Output
Output
Output
90% 90%
90%
90%
50%
10%10%
10%
10%
50%
50%
50%
50%
50%
Switch
Input
Control
Input
V
IN
V
OUT
V
OUT
0.9 x V
OUT
R
L
C
L
t
D
B
0
B
1
S
A
Logic
Input
Logic
Input
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