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ManualsBrandsON SEMICONDUCTOR ManualsLogic ICsLogic IC - Gate OR gate 74HCT SOIC 14
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M54HCT32
M74HCT32
February 1993
QUAD 2-INPUT OR GATE
B1R
(Plastic Package)
ORDER CODES :
M54HCT32F1R M74HCT32M1R
M74HCT32B1R M74HCT32C1R
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
PIN CONNECTIONS (top view)
NC =
No Internal
Connection
INPUT AND OUTPUT EQUIVALENT CIRCUIT
.HIGH SPEED
t
PD
= 12 ns (TYP.) AT V
CC
=5V
.LOW POWER DISSIPATION
I
CC
=1µA (MAX.) AT T
A
=25°C
.COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN.) V
IL
= 0.8V (MAX)
.OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.SYMMETRICAL OUTPUT IMPEDANCE
IOH =I
OL
= 4 mA (MIN.)
.BALANCEDPROPAGATION DELAYS
t
PLH
=t
PHL
.PIN AND FUNCTION COMPATIBLE WITH
54/74LS32
The M54/74HCT32 is a high speed CMOS 2-INPUT
OR GATE fabricated in silicon gate C2MOS technol-
ogy. It has the same high speed performance of
LSTTL combined with true CMOS low power con-
sumption. It achieves the high speed operation similar
to equivalent LSTTL while maintaining the CMOS low
power dissipation. The internal circuit is composed of
2 stages including buffered output, which gives high
noise immunity and a stable output. All inputs are
equipped with protection circuits against static dis-
charge and transient excess voltage.
This integrated circuit has input and output charac-
teristics that are fully compatible with 54/74 LSTTL
logic families. M54/74HCT devices are designed to
directly interface HSC2MOS systems with TTL and
NMOS components. They are also plug in replace-
ments for LSTTL devices giving a reduction of
power consumption.
DESCRIPTION
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Summary of content (9 pages)