Data Sheet

ManualsBrandsON SEMICONDUCTOR ManualsPMICsPMIC - LDO voltage regulator Positive, fixed SOP 8

5

6

7

8

9

2.00

MIN

0.50

45°

X

5.30

MIN

1.50

2.23

MIN

0.96

MIN

0.90

MIN

2X

3.00

MIN

90°

4.50

3.90

C

1.30

0.89

0.54

1.50

0.52

0.30

(2X)

C

4.70

4.30

C

1.87

1.45

C

1.40

2.70

2.30

C

3.00

0.30

45°

X

1 2 3

1

3

0.10

M

C

A B

A

B

1.70

1.30

C

SEATING PLANE

C

2.70

0.35

0.60

0.40

C

0.50

0.35

2.29

2.13

NOTES: UNLESS OTHERWISE SPECIFIED.

A. REFERENCE TO JEDEC TO-243 VARIATION AA.

B. ALL DIMENSIONS ARE IN MILLIMETERS.

C

DOES NOT COMPLY JEDEC STANDARD VALUE.

D. DIMENSIONS ARE EXCLUSIVE OF BURRS,

MOLD FLASH AND TIE BAR PROTRUSION.

E. DIMENSION AND TOLERANCE AS PER ASME

Y14.5-1994.

F. DRAWING FILE NAME: MA03CREV3

LAND PATTERN

RECOMMENDATION

C

L

SYMM

1 32