Datasheet
MC34151, MC33151
http://onsemi.com
8
LAYOUT CONSIDERATIONS
High frequency printed circuit layout techniques are
imperative to prevent excessive output ringing and overshoot.
Do not attempt to construct the driver circuit on
wire−wrap or plug−in prototype boards. When driving
large capacitive loads, the printed circuit board must contain
a low inductance ground plane to minimize the voltage spikes
induced by the high ground ripple currents. All high current
loops should be kept as short as possible using heavy copper
runs to provide a low impedance high frequency path. For
optimum drive performance, it is recommended that the
initial circuit design contains dual power supply bypass
capacitors connected with short leads as close to the V
CC
pin
and ground as the layout will permit. Suggested capacitors are
a low inductance 0.1 mF ceramic in parallel with a 4.7 mF
tantalum. Additional bypass capacitors may be required
depending upon Drive Output loading and circuit layout.
Proper printed circuit board layout is extremely
critical and cannot be over emphasized.
The MC34151 greatly enhances the drive capabilities of common switching
regulators and CMOS/TTL logic devices.
Figure 19. Enhanced System Performance with
Common Switching Regulators
Figure 20. MOSFET Parasitic Oscillations
Figure 21. Direct Transformer Drive Figure 22. Isolated MOSFET Drive
Series gate resistor R
g
may be needed to damp high frequency parasitic
oscillations caused by the MOSFET input capacitance and any series
wiring inductance in the gate-source circuit. R
g
will decrease the
MOSFET switching speed. Schottky diode D
1
can reduce the driver's
power dissipation due to excessive ringing, by preventing the output pin
from being driven below ground.
Output Schottky diodes are recommended when driving inductive loads at
high frequencies. The diodes reduce the driver's power dissipation by
preventing the output pins from being driven above V
CC
and below ground.
+
-
V
CC
47
0.1
6
5.7V
TL494
or
TL594
2
4
3
100k100k
7
5
V
in
+
+
++
+
+
100k
1N5819
D
1
R
g
V
in
+
+
100k100k
3
7
5
4 X
1N5819
+
+
+
+
3
100k
1N
5819
Isolation
Boundary