Datasheet

ManualsBrandsON SEMICONDUCTOR ManualsPMICsPMIC - gate drivers MC 34151 Inverting Low side PDIP 8

August, 2013 − Rev. 9

1 Publication Order Number:

MC34151/D

MC34151, MC33151

High Speed Dual

MOSFET Drivers

The MC34151/MC33151 are dual inverting high speed drivers

specifically designed for applications that require low current digital

circuitry to drive large capacitive loads with high slew rates. These

devices feature low input current making them CMOS and LSTTL

logic compatible, input hysteresis for fast output switching that is

independent of input transition time, and two high current totem pole

outputs ideally suited for driving power MOSFETs. Also included is

an undervoltage lockout with hysteresis to prevent erratic system

operation at low supply voltages.

Typical applications include switching power supplies, dc to dc

converters, capacitor charge pump voltage doublers/inverters, and

motor controllers.

These devices are available in dual−in−line and surface mount

packages.

Features

• Two Independent Channels with 1.5 A Totem Pole Output

• Output Rise and Fall Times of 15 ns with 1000 pF Load

• CMOS/LSTTL Compatible Inputs with Hysteresis

• Undervoltage Lockout with Hysteresis

• Low Standby Current

• Efficient High Frequency Operation

• Enhanced System Performance with Common Switching Regulator

Control ICs

• Pin Out Equivalent to DS0026 and MMH0026

• These are Pb−Free and Halide−Free Devices

Figure 1. Representative Block Diagram

5.7V

Logic Input A

Logic Input B

GND

100k

Drive Output A

Drive Output B

100k

http://onsemi.com

See detailed ordering and shipping information in the package

dimensions section on page 10 of this data sheet.

ORDERING INFORMATION

PDIP−8

P SUFFIX

CASE 626

MARKING

DIAGRAMS

MC3x151P

AWL

YYWWG

SOIC−8

D SUFFIX

CASE 751

x = 3 or 4

A = Assembly Location

WL, L = Wafer Lot

YY, Y = Year

WW, W = Work Week

G or G = Pb−Free Package

PIN CONNECTIONS

1 8 N.C.N.C.

(Top View)

2 7 Drive Output ALogic Input A

36V

GND

4 5 Drive Output BLogic Input B

3151V

ALYWG

(Note: Microdot may be in either location)

3x151

ALYWG

MC3x151 MC33151V

Summary of content (12 pages)

PAGE 1
MC34151, MC33151 High Speed Dual MOSFET Drivers The MC34151/MC33151 are dual inverting high speed drivers specifically designed for applications that require low current digital circuitry to drive large capacitive loads with high slew rates. These devices feature low input current making them CMOS and LSTTL logic compatible, input hysteresis for fast output switching that is independent of input transition time, and two high current totem pole outputs ideally suited for driving power MOSFETs.
PAGE 2
MC34151, MC33151 MAXIMUM RATINGS Symbol Value Unit Power Supply Voltage Rating VCC 20 V Logic Inputs (Note 1) Vin −0.3 to VCC V Drive Outputs (Note 2) Totem Pole Sink or Source Current Diode Clamp Current (Drive Output to VCC) IO IO(clamp) 1.5 1.0 PD RqJA 0.56 180 W °C/W PD RqJA 1.
PAGE 3
MC34151, MC33151 ELECTRICAL CHARACTERISTICS (VCC = 12 V, for typical values TA = 25°C, for min/max values TA is the only operating ambient temperature range that applies [Note 3], unless otherwise noted.) Characteristics Symbol Min Typ Max Unit VIH VIL − 0.8 1.75 1.58 2.6 − V IIH IIL − − 200 20 500 100 mA VOL − − − 10.5 10.4 9.5 0.8 1.1 1.7 11.2 11.1 10.9 1.2 1.5 2.5 − − − V RPD − 100 − kW tPLH(in/out) tPHL(in/out) − − 35 36 100 100 Drive Output Rise Time (10% to 90%) CL = 1.
PAGE 4
MC34151, MC33151 12 4.7 V 0.1 + 6 + + + + - + 5.7V Drive Output 7 100k 2 Logic Input 50 CL 5.0 V Logic Input tr, tf ≤ 10 ns 0V + + 90% 10% tPLH 5 4 100k tPHL 90% 10% Drive Output 3 Figure 2. Switching Characteristics Test Circuit Figure 3. Switching Waveform Definitions 2.2 V th , INPUT THRESHOLD VOLTAGE (V) I in , INPUT CURRENT (mA) 2.4 VCC = 12 V TA = 25°C 2.0 1.6 1.2 0.8 0.4 0 0 2.0 4.0 6.0 8.0 Vin, INPUT VOLTAGE (V) 10 VCC = 12 V 2.0 1.8 Upper Threshold Low State Output 1.6 1.
PAGE 5
90% Logic Input V clamp , OUTPUT CLAMP VOLTAGE (V) MC34151, MC33151 VCC = 12 V Vin = 5 V to 0 V CL = 1.0 nF TA = 25°C Drive Output 10% 3.0 High State Clamp (Drive Output Driven Above VCC) 1.0 VCC 0 0 GND -1.0 0 50 ns/DIV VCC -1.0 -2.0 Source Saturation VCC = 12 V (Load to Ground) 80 ms Pulsed Load 120 Hz Rate TA = 25°C -3.0 3.0 2.0 1.0 0 Sink Saturation (Load to VCC) 0 0.2 GND 0.4 0.6 0.8 1.0 IO, OUTPUT LOAD CURRENT (A) 0.2 Low State Clamp (Drive Output Driven Below Ground) 0.4 0.6 0.
PAGE 6
MC34151, MC33151 80 VCC = 12 V VIN = 0 V to 5.0 V TA = 25°C 60 ICC, SUPPLY CURRENT (mA) t r -t f , OUTPUT RISE‐FALL TIME(ns) 80 40 tf 20 tr 0 0.1 1.0 CL, OUTPUT LOAD CAPACITANCE (nF) f = 500 kHz 20 f = 50 kHz 1.0 CL, OUTPUT LOAD CAPACITANCE (nF) 10 TA = 25°C ICC , SUPPLY CURRENT (mA) ICC , SUPPLY CURRENT (mA) 40 8.0 Both Logic Inputs Driven 0 V to 5.0 V, 50% Duty Cycle Both Drive Outputs Loaded TA = 25°C 1 - VCC = 18 V, CL = 2.5 nF 2 - VCC = 12 V, CL = 2.5 nF 3 - VCC = 18 V, CL = 1.
PAGE 7
MC34151, MC33151 the NPN pullup during the negative output transient, power dissipation at high frequencies can become excessive. Figures 20, 21, and 22 show a method of using external Schottky diode clamps to reduce driver power dissipation. gate charge information on their data sheets. Figure 18 shows a curve of gate voltage versus gate charge for the ON Semiconductor MTM15N50. Note that there are three distinct slopes to the curve representing different input capacitance values.
PAGE 8
MC34151, MC33151 LAYOUT CONSIDERATIONS optimum drive performance, it is recommended that the initial circuit design contains dual power supply bypass capacitors connected with short leads as close to the VCC pin and ground as the layout will permit. Suggested capacitors are a low inductance 0.1 mF ceramic in parallel with a 4.7 mF tantalum. Additional bypass capacitors may be required depending upon Drive Output loading and circuit layout.
PAGE 9
MC34151, MC33151 Vin IB Vin + 0 + Base Charge Removal - Rg(on) + 100k C1 100k Rg(off) The totem-pole outputs can furnish negative base current for enhanced transistor turn-off, with the addition of capacitor C1. In noise sensitive applications, both conducted and radiated EMI can be reduced significantly by controlling the MOSFET's turn-on and turn-off times. Figure 23. Controlled MOSFET Drive Figure 24. Bipolar Transistor Drive VCC = 15 V 4.7 0.1 + 6 + + + - + 5.7V + 6.
PAGE 10
MC34151, MC33151 ORDERING INFORMATION Package Shipping† MC34151DG SOIC−8 (Pb−Free) 98 Units / Rail MC34151DR2G SOIC−8 (Pb−Free) 2500 Tape & Reel MC34151PG PDIP−8 (Pb−Free) 50 Units / Rail MC33151DG SOIC−8 (Pb−Free) 98 Units / Rail MC33151DR2G SOIC−8 (Pb−Free) 2500 Tape & Reel MC33151PG PDIP−8 (Pb−Free) 50 Units / Rail MC33151VDR2G SOIC−8 (Pb−Free) 2500 Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our T
PAGE 11
MC34151, MC33151 PACKAGE DIMENSIONS PDIP−8 P SUFFIX CASE 626−05 ISSUE N D A E H 8 5 E1 1 4 NOTE 8 b2 c B END VIEW TOP VIEW WITH LEADS CONSTRAINED NOTE 5 A2 A e/2 NOTE 3 L SEATING PLANE A1 C D1 M e 8X SIDE VIEW b 0.010 eB END VIEW M C A M B M NOTE 6 http://onsemi.com 11 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACKAGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3. 4.
PAGE 12
MC34151, MC33151 PACKAGE DIMENSIONS SOIC−8 D SUFFIX CASE 751−07 ISSUE AK −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07.