Data Sheet

© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSSD07 Rev. 1.0.2 10
FSSD07 — 1-Bit / 4-Bit SD/SDIO and MMC Dual-Host Multiplexer
Test Diagrams
Selec
t
nDAT[3:0],nCMD
DAT[3:0],CMD
V
S
= 0 or
V
DDH
I
ON
V
ON
R
ON
= V
ON
/I
ON
GND
V
IN
GND
Selec
t
DAT[3:0],CMD
V
S
I
ON
V
ON
GNDGND
V
IN
GND
V
IN
GNDGNDGND
Select
V
S
= 0 or V
DDH
NC
A
I
OZ
V
IN
GND
I
OZ
V
IN
GND
V
IN
GNDGNDGND
Each switch port tested separately.
Figure 5. On Resistance Figure 6. Off Leakage
R
L
,R
S
,andC
L
are functions of the application
environment (see AC tables for specific values).
C
L
includes test fixture and stray capacitance.
C
L
R
L
GND
GND
R
S
V
S
V
SW
GND
V
OUT
DAT[3:0],
CMD
nDAT[3:0],nCMD
V
DDx
V
V
OUT
V
t
RISE
= 2.5ns
GND
V
ddx
90% 90%
10%10%
t
FALL
= 2.5ns
V
ddx
/2
V
ddx
/2
Input - V
CNTRL
Output - V
OUT
50%
V
OH
V
OL
t
OFF
t
ON
+0.15V
Output - V
OUT
50%
V
OL
t
ON
t
OFF
+0.15V
V
OH
V
OL
V
OL
Figure 7. AC Test Circuit Load Figure 8. Turn On/Off Time Waveforms
t
RISE
=2.5ns
GND
V
ddx
90% 90%
10%10%
t
FALL
=2.5ns
V
ddx
/2
V
ddx
/2
Input - V
SW
Output- V
OUT
50%
50%
V
OH
V
OL
t
pLH
t
pHL
RISE
t
FALL
/2
V
ddx
/2
-
-
pLH pHL
/2
-
-
Figure 9. Switch Propagation Delay (t
PD
) Waveform Figure 10. AC Test Circuit Load (CLK)
R
L
, R
S
and C
L
are function of application
environment (see AC Tables for specific
values)
C
L
includes test fixture and stray capacitance
C
L
GND
GND
R
S
V
S
V
CLKI
GND
V
OUT
CLK
1CLK, 2CLK
R
L
, R
S
and C
L
are function of application
environment (see AC Tables for specific
values)
C
L
includes test fixture and stray capacitance
C
L
GNDGND
GND GND
R
S
R
S
V
S
V
CLKI
GND
V
CLKI
GNDGNDGND
V
OUT
V
OUT
CLK
1CLK, 2CLK