Data Sheet

FSB50550AS Motion SPM® 5 Series
©2012 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com
FSB50550AS Rev. C4
Pin descriptions
Figure 1. Pin Configuration and Internal Block Diagram (Bottom View)
1st Notes:
3. Source terminal of each low-side MOSFET is not connected to supply ground or bias voltage ground inside Motion SPM
®
5 product. External connections should be made as
indicated in Figure 3.
Pin Number Pin Name Pin Description
1 COM IC Common Supply Ground
2V
B(U)
Bias Voltage for U-Phase High-Side MOSFET Driving
3V
CC(U)
Bias Voltage for U-Phase IC and Low-Side MOSFET Driving
4IN
(UH)
Signal Input for U-Phase High-Side
5IN
(UL)
Signal Input for U-Phase Low-Side
6 N.C No Connection
7V
B(V)
Bias Voltage for V-Phase High Side MOSFET Driving
8V
CC(V)
Bias Voltage for V-Phase IC and Low Side MOSFET Driving
9IN
(VH)
Signal Input for V-Phase High-Side
10 IN
(VL)
Signal Input for V-Phase Low-Side
11 V
TS
Output for HVIC Temperature Sensing
12 V
B(W)
Bias Voltage for W-Phase High-Side MOSFET Driving
13 V
CC(W)
Bias Voltage for W-Phase IC and Low-Side MOSFET Driving
14 IN
(WH)
Signal Input for W-Phase High-Side
15 IN
(WL)
Signal Input for W-Phase Low-Side
16 N.C No Connection
17 P Positive DC-Link Input
18 U, V
S(U)
Output for U-Phase & Bias Voltage Ground for High-Side MOSFET Driving
19 N
U
Negative DC-Link Input for U-Phase
20 N
V
Negative DC-Link Input for V-Phase
21 V, V
S(V)
Output for V-Phase & Bias Voltage Ground for High-Side MOSFET Driving
22 N
W
Negative DC-Link Input for W-Phase
23 W, V
S(W)
Output for W Phase & Bias Voltage Ground for High-Side MOSFET Driving
(1) COM
(2) V
B(U)
(3) V
CC(U)
(4) IN
(UH)
(5) IN
(UL)
(6) N.C
(7) V
B(V)
(8) V
CC(V)
(9) IN
(VH)
(10) IN
(VL)
(11) VTS
(12) V
B(W)
(13) V
CC(W)
(14) IN
(WH)
(15) IN
(WL)
(16)
(17) P
(18) U, V
S(U)
(19) N
U
(20) N
V
(21) V, V
S(V)
(22) N
W
(23) W, V
S(W)
COM
VCC
LIN
HIN
VB
HO
VS
LO
COM
VCC
LIN
HIN
VB
HO
VS
LO
V
TS
COM
VCC
LIN
HIN
VB
HO
VS
LO
N.C