Data Sheet

ManualsBrandsON SEMICONDUCTOR ManualsInterface ICsInterface IC - analogue switches UMLP 24

December-2017, Rev. 2 FSA642/D

FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch

FSA642

Low-Power, Three-Port, High-Speed MIPI Switch

Features

 Low On Capacitance: 7.0 pF Typical

 Low On Resistance: 7.0 Ω Typical

 Wide -3db Bandw idth: 1 GHz Typical

 24-Lead UMLP (2.5 x 3.4 mm) Package

 8 kV ESD Rating; >16 kV Pow er/GND ESD Rating

Applications

 Dual Camera Applications for Cell Phones

 Dual LCD Applications for Cell Phones,

Digital Camera Displays, and View finders

Description

The FSA642 is a bi-directional, low -pow er, high-speed

analog sw itch. The pin out is designed to ease

differential signal layout and is configured as a triple-

pole, double-throw sw itch (TPDT). The FSA642 is

optimized for sw itching betw een tw o MIPI devices, such

as cameras or LCD displays and on-board Multimedia

Application Processors (MAP).

The FSA642 is compatible w ith the requirements of

Mobile Industry Processor Interface (MIPI). The low -

capacitance design allow s the FSA642 to sw itch signals

that exceed 500 MHz in frequency. Superior channel-to-

channel crosstalk immunity minimizes interference and

allow s the transmission of high-speed differential signals

and single-ended signals, as described by the MIPI

specification.

Ordering Information

Part Number

Top Mark

Operating Temperature Range

Package

FSA642UMX

-40 to +85°C

24-Lead, Quad, Ultrathin Molded Leadless

Package (UMLP), 2.5 x 3.4 mm

Camera 1 Camera 2

MAP Processor

FSA642

LCD 1 LCD 2

MAP Processor

FSA642

Figure 1. Application Block Diagram

Summary of content (12 pages)

PAGE 1
Features Description      The FSA642 is a bi-directional, low -pow er, high-speed analog sw itch. The pin out is designed to ease differential signal layout and is configured as a triplepole, double-throw sw itch (TPDT). The FSA642 is optimized for sw itching betw een tw o MIPI devices, such as cameras or LCD displays and on-board Multimedia Application Processors (MAP). Low On Capacitance: 7.0 pF Typical Low On Resistance: 7.0 Ω Typical Wide -3db Bandw idth: 1 GHz Typical 24-Lead UMLP (2.5 x 3.
PAGE 2
15 14 13 CLKAN DA1P DA1N DA2P 20 16 CLKAP DB2P 17 DB2N 19 18 DA2N 12 DB1P SEL 11 21 DB1N VCC 10 22 CLKBP GND 9 23 CLKBN /OE 8 24 NC NC 7 CLKP CLKN D1P D1N D2P D2N 642 1 2 3 4 5 6 Figure 2.
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FSA642 CLKAP (17) CLKAN (16) (1) CLKP (2) CLKN DA1P (15) DA1N (14) DA2P (13) DA2N (12) (3) D1P (4) D1N CLKBP (22) CLKBN (23) DB1P (20) DB1N (21) (5) D2P (6) D2N DB2P (19) DB2N (18) (8) /OE (11) SEL Sw itch Control (10) V CC (9) GND Figure 3. Functional Diagram Truth Table SEL /OE Function Don’t Care HIGH Disconnect LOW LOW D1, D2, CLK=DA1, DA2, CLKA HIGH LOW D1, D2, CLK=DB1, DB2, CLKB www.onsemi.
PAGE 4
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these lev els is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
PAGE 5
All typical values are TA=25°C unless otherw ise specified. Symbol Parameter Conditions TA=-40 to +85ºC VCC (V) V IK Clamp Diode Voltage IIN=-18 mA IIN Control Input Leakage V SW=0 to 4.3 V V IH Input Voltage High V IN=0 to V CC V IL Input Voltage Low V IN=0 to V CC IOZ Off-State Leakage A,B=0+0.3 V to V CC-0.3 4.3 ICC Quiescent Supply Current V CNTRL=0 or V CC, IOUT=0 ICCT Increase in ICC Current Per Control Voltage and V CC V CNTRL=1.8 V Min. Typ. Max. 2.775 4.3 -1 2.
PAGE 6
All values are at RL=50Ω and RS=50Ω and all typical values are V CC=2.775V at TA=25°C unless otherw ise specified. Symbol Parameter Conditions (7) OIRR Off Isolation Xtalk Non-Adjacent Channel (7) Crosstalk BW -3 db Bandw idth tON Turn-On Time SEL, /OE to Output tOFF Turn-Off Time SEL, /OE to Output tPD Propagation Delay tBBM Break-Before-Make Time (7) (7) VCC (V) TA=-40ºC to +85ºC Min. Typ. Max. Units f=100 MHz, RT=50 Ω Figure 14 2.775 -35 dB f=100 MHz, RT=50 Ω Figure 15 2.
PAGE 7
VON I Dn(OFF) NC A DA/Bn VSW Dn VSW Select GND I ON Select RON = VON / ION V Sel = GND V Sel = GND 0 orV V cc 0 orV cc **Each switch port is tested separately Figure 4. On Resistance Figure 5. Off Leakage tRISE = 2.5ns DA B / n tFALL = 2.
PAGE 8
(Continued) tRI SE= 2.5ns Vcc HSDn Dn VSW1 GND 1 % 0 0V VOUT CL VSW2 RL V OUT GND GND 9 % V0 cc/ 2 I nput - VSe l 0.9*Vo RS 0. 9*Vo t u u VSel tBBM RL , RS , and C L ar functio ns o f the application envir onme nt (seee A C Tab les fo r sp ecific v l ues). CL includes test fixture a nd str a ca pacitaan ce. y GND Figure 12.
PAGE 9
FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch Physical Dimensions Figure 16. 24-Lead UMLP Package Product-Specific Dimensions Description Nominal Values (mm) Description Nominal Values (mm) Overall Height PKG Standoff Lead Thickness Lead Width (24x) 0.500 0.026 0.152 0.200 Lead Length (23x) Lead Length, Pin 1 (1x) Lead Pitch Body Length (X) Body Width (Y) 0.4 0.5 0.4 3.4 2.5 www.onsemi.
PAGE 10
FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch Figure 17. Tape and Reel Packing Specification, page 1 www.onsemi.
PAGE 11
FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch Figure 18. Tape and Reel Packing Specification, page 2 www.onsemi.
PAGE 12
FSA642 — Low-Power, Three-Port, High-Speed MIPI Switch ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf.