Data Sheet

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Nov ember-2017, Rev . 2 FSA2567/D

FSA2567 — Low-Power, Dual SIM Card Analog Switch

FSA2567 — Low-Power, Dual SIM Card Analog

Switch

Features



Low On Capacitance for Data Path: 10 pF Typical

 Low On Resistance for Data Path: 6 Ω Typical

 Low On Resistance for Supply Path: 0.4 Ω Typical

 Wide V

Operating Range: 1.65 V to 4.3 V

 Low Pow er Consumption: 1 μA Max imum

- 15 μA Max imum I

CCT

Over Expanded Voltage

Range (V

=1.8 V, V

=4.3 V)

 Wide -3 db Bandw idth: > 160 MHz

 Packaged in:

- Pb-free 16-Lead MLP & 16-Lead UMLP

 3 kV ESD Rating, >12 kV Pow er/GND ESD Rating

Applications



Cell phone, PDA, Digital Camera, and Notebook

 LCD Monitor, TV, and Set-Top Box

Description

The FSA2567 is a bi-directional, low -pow er, dual double-

pole, double-throw ( 4PDT) analog sw itch targeted at dual

SIM card multiplexing. It is optimized for sw itching the

WLAN-SIM data and control signals and dedicates one

channel as a supply-source sw itch.

The FSA2567 is compatible w ith the requirements of SIM

cards and features a low on capacitance (C

) of 10 pF

to ensure high-speed data transfer. The V

SIM

sw itch path

has a low R

characteristic to ensure minimal voltage

drop in the dual SIM card supply paths.

The FSA2567 contains special circuitry that minimizes

current consumption w hen the control voltage applied to

the SEL pin is low er than the supply voltage (V

). This

feature is especially valuable in ultra-portable applications,

such as cell phones; allow ing direct interface w ith the

general-purpose I/Os of the baseband processor. Other

applications include sw itching and connector sharing in

portable cell phones, PDAs, digital cameras, printers, and

notebook computers.

Ordering Information

Part Number Top Mark

Operating

Temperature

Range

Package

FSA2567MPX FSA2567 -40 to +85°C

16-Lead, Molded Leadless Package (MLP) Quad, JEDEC MO-

220, 3 mm Square

FSA2567UMX GX

16-Lead, Quad, Ultrathin Molded Leadless Package (UMLP),

1.8 x 2.6 mm

Summary of content (12 pages)

PAGE 1
Features Description      The FSA2567 is a bi-directional, low -pow er, dual doublepole, double-throw (4PDT) analog sw itch targeted at dual SIM card multiplexing. It is optimized for sw itching the WLAN-SIM data and control signals and dedicates one channel as a supply-source sw itch. Low On Capacitance for Data Path: 10 pF Typical Low On Resistance for Data Path: 6 Ω Typical Low On Resistance for Supply Path: 0.4 Ω Typical Wide V CC Operating Range: 1.65 V to 4.
PAGE 2
VSIM VSIM 1RST 2RST 1CLK 2CLK 1DAT 2DAT RST CLK DAT Sel Figure 1. Analog Sym bol 13 16 15 14 13 1DAT 1DAT 14 VCC VCC 15 2V SIM 2V SIM 16 V SIM V SIM Pin Assignments 1V SIM 1 1VSIM 1 Sel 2 2RST 3 10 No Connect RST 4 9 12 DAT 12 DAT 11 2DAT 2RST 3 10 No Connect RST 4 9 1CLK Figure 2. Pad Assignm ent MLP16 (Top Through View ) 5 6 7 8 1RST GND 2CLK CLK Figure 3.
PAGE 3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol V CC Parameter Max. Unit -0.5 +5.5 V (1) -0.5 V CC V V SW DC Sw itch I/O Voltage(1) -0.5 V CC + 0.
PAGE 4
All typical values are at 25°C, 3.3 V V CC unless otherw ise specified. Symbol Parameter Conditions VCC (V) TA=- 40ºC to +85ºC Min. V IK V IH V IL IIN Clamp Diode Voltage RONV 2.7 Input Voltage High Input Voltage Low Control Input Leakage Inc(off), Ino(off), Off State Leakage ROND IIN = -18 mA Data Path Sw itch On Resistance(3) V SIM Sw itch On Resistance(3) Typ. -1.2 1.65 to 2.3 1.1 2.7 to 3.6 1.3 4.3 1.7 Units Max. V V 1.65 to 2.3 0.4 2.7 to 3.6 0.5 4.3 0.
PAGE 5
All typical value are for V CC=3.3V at 25°C unless otherw ise specified. Symbol Parameter Conditions VCC (V) TA=- 40°C to +85°C Min. Units Typ. Max. 1.8(5) 65 95 ns 2.7 to 3.6 42 60 ns 1.8(5) 30 50 ns 2.7 to 3.6 20 40 ns 1.8(5) 55 80 ns 2.7 to 3.6 35 55 ns 1.8(5) 35 50 2.7 to 3.6 22 40 0.25 ns Turn-On Time Sel to Output (DAT,CLK,RST) RL = 50 Ω, CL = 35 pF V SW = 1.5 V Figure 11, Figure 12 Turn-Off Time Sel to Output (DAT,CLK,RST) RL = 50 Ω, CL= 35 pF V SW = 1.
PAGE 6
Symbol Parameter Conditions TA =- 40°C to +85°C Min. CIN Typ. Control Pin Input Capacitance V CC = 0 V 1.5 COND RST, CLK, DAT On Capacitance(6) V CC = 3.3 V, f = 1 MHz Figure 20 10 12 CONV V SIM On Capacitance(6) V CC = 3.3 V, f = 1 MHz Figure 20 110 150 COFFD RST, CLK, DAT Off Capacitance V CC = 3.3 V, Figure 19 3 COFFV V SIM Off Capacitance V CC = 3.3 V, Figure 19 40 Note: 6. Guaranteed by characterization. www.onsemi.com 6 Units Max.
PAGE 7
0.50 5.00 4.00 RON (Ohms) 6.00 85°C 25°C -40°C 3.00 0.00 25°C 0.30 -40°C 0.20 0.10 1.00 2.00 -1.00 3.00 0.00 1.00 Figure 4. RON Data Path Figure 5. RON V SIM Frequency Response Off Isolation (dB) 0 1 10 100 -10 -30 -50 -70 -90 -110 Frequency (MHz) VCC = 2.7V Figure 6. Off Isolation Frequency Response 0 1 10 100 -5 -15 -25 -35 -45 -55 -65 -75 -85 -95 -105 -115 -125 Frequency (MHz) VCC = 2.7V Figure 7. Crosstalk Frequency Response 0 -1 -2 -3 -4 -5 -6 -7 -8 1 2.
PAGE 8
VON InA(OFF) NC nVSIM , nRST, nCLK, or nDAT A VSIM , RST, CLK, or DAT VSW VSW I ON GND GND GND R ON = VON / I ON V Sel VSel = 0 or VCC Figure 9. On Resistance = 0 or V CC Figure 10. Off Leakage tFALL = 2.5ns tRISE = 2.5ns nVSIM, nRST, nCLK,or nDAT VSIM, RST, CLK,or DAT VCC 90% VSW VOUT RL CL GND 10% GND GND Sel 90% Input – VSel VCC /2 VCC /2 10% VOH 90% 90% RL and C L are functions of the application environment (see tables for specific values).
PAGE 9
tRISE = 2.5ns nVSIM, nRST, nCLK or nDAT VSIM ,RST, CLK or DAT VSW1 GND VOUT CL VSW2 VCC InputVSel 10% 0V RL VOUT GND GND 90% VCC/2 0.9 • VOUT 0.9 • VOUT tBBM Sel RL and C L are functions of the application environment (see tables for specific values). CL includes test fixture and stray capacitance. Figure 15.
PAGE 10
1.80 0.05 C A B 2X 2.10 0.563 (15X) 0.663 2.60 PIN#1 IDENT 1 2.90 0.05 C TOP VIEW 0.10 C 0.40 2X 0.50±0.05 0.225 (16X) 0.15±0.05 RECOMMENDED LAND PATTERN 0.08 C SEATING C PLANE 0.025±0.025 SIDE VIEW 0.50±0.05 1.80±0.05 5 0.40±0.05 (15X) 0.20±0.05 9 0.40 DETAIL A 45° DETAIL A SCALE : 2X 2.60±0.05 1 PIN#1 IDENT 16 13 0.20±0.05 (16X) BOTTOM VIEW 0.10 C A B 0.05 C NOTES: A. PACKAGE DOES NOT FULLY CONFORM TO JEDEC STANDARD. LEAD SHAPE AT PACKAGE EDGE R0.
PAGE 11
FSA2567 — Low-Power, Dual SIM Card Analog Switch Physical Dimensions Figure 22. 16-Term inal Molded Leadless Package (MLP) www.onsemi.
PAGE 12
FSA2567 — Low-Power, Dual SIM Card Analog Switch ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf.