Data Sheet

© 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7888 • Rev.1.5 3
FAN7888 — 3 Half-Bridge Gate-Drive IC
Pin Configuration
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin # Name Description
1 HIN1 Logic input 1 for high-side gate 1 driver
2 LIN1 Logic input 1 for low-side gate 1 driver
3 HIN2 Logic input 2 for high-side gate 2 driver
4 LIN2 Logic input 2 for low-side gate 2 driver
5 HIN3 Logic input 3 for high-side gate 3 driver
6 LIN3 Logic input 3 for low-side gate 3 driver
7 LO3 Low-side gate driver 3 output
8 V
S3
High-side driver 3 floating supply offset voltage
9 HO3 High-side driver 3 gate driver output
10 V
B3
High-side driver 3 floating supply voltage
11 GND Ground
12 V
DD
Logic and all low-side gate drivers power supply voltage
13 LO2 Low-side gate driver 2 output
14 V
S2
High-side driver 2 floating supply offset voltage
15 HO2 High-side driver 2 gate driver output
16 V
B2
High-side driver 2 floating supply voltage
17 LO1 Low-side gate driver 1 output
18 V
S1
High-side driver 1 floating supply offset voltage
19 HO1 High-side driver 1 gate driver output
20 V
B1
High-side driver 1 floating supply voltage
GND
LO3
FAN7888
LIN1
V
DD
V
S1
HO1
V
B1
HIN1
HIN2
HIN3
LIN2
LIN3
LO2
LO1
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
V
S2
HO2
V
B2
V
S3
HO3
V
B3
FAN7888 Rev.00