Data Sheet

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FAN3180 • Rev. 1.0.3 13

FAN3180 — Single 2-A Low-Side Driver with 3.3-V LDO

Layout and Connection Guidelines

The FAN3180 incorporates fast reacting input circuits,

short propagation delays, and output stages capable of

delivering current peaks over 1 A to facilitate voltage

transition times from under 10 ns to over 100 ns. The

following guidelines are strongly recommended:

 Keep high-current output and power ground paths

separate from logic input signals and signal ground

paths. This is especially critical when dealing with

TTL-level logic thresholds.

 Keep the driver as close to the load as possible to

minimize the length of high-current traces. This

reduces the series inductance to improve high-

speed switching, while reducing the loop area that

can radiate EMI to the driver inputs and other

surrounding circuitry.

 Many high-speed power circuits can be susceptible

to noise injected from their own output or other

external sources, possibly causing output re-

triggering. These effects can be especially obvious

if the circuit is tested in breadboard or non-optimal

circuit layouts with long input, enable, or output

leads. For best results, make connections to all pins

as short and direct as possible.

 The turn-on and turn-off current paths should be

minimized as discussed in the following sections.

Figure 33 shows the pulsed gate-drive current path

when the gate driver is supplying gate charge to turn the

MOSFET on. The current is supplied from the local

bypass capacitor, C

BYP

, and flows through the driver to

the MOSFET gate and to ground. To reach the high

peak currents possible, the resistance and inductance in

the path should be minimized. The localized C

BYP

acts

to contain the high peak-current pulses within this

driver-MOSFET circuit, preventing them from disturbing

the sensitive analog circuitry in the PWM controller.

PWM

BYP

FAN3180

Figure 33. Current Path for MOSFET Turn-On

Figure 34 shows the current path when the gate driver

turns the MOSFET off. Ideally, the driver shunts the

current directly to the source of the MOSFET in a small

circuit loop. For fast turn-off times, the resistance and

inductance in this path should be minimized.

PWM

BYP

FAN3180

Figure 34. Current Path for MOSFET Turn-Off

Thermal Guidelines

Gate drivers used to switch MOSFETs and IGBTs at

high frequencies can dissipate significant amounts of

power. It is important to determine the driver power

dissipation and the resulting junction temperature in the

application to ensure that the part is operating within

acceptable temperature limits.

The total power dissipation in a gate driver is the sum of

three components; P

GATE

, P

QUIESCENT

, and P

DYNAMIC

Dynamicgatetotal

P P P 

(1)

Gate Driving Loss: The most significant power loss

results from supplying gate current (charge per unit

time) to switch the load MOSFET on and off at the

switching frequency. The power dissipation that results

from driving a MOSFET at a specified gate-source

voltage, V

, with gate charge, Q

, at switching

frequency, f

, is determined by:

swGSGGATE

f V Q P 

(2)

Dynamic Pre-drive / Shoot-through Current: A power loss

resulting from internal current consumption under

dynamic operating conditions, including pin pull-up /

pull-down resistors, can be obtained using the I

(No-

Load) vs. Frequency graphs in Typical Performance

Characteristics to determine the current I

DYNAMIC

drawn

from V

under actual operating conditions:

DDDYNAMICDYNAMIC

V I P 

(3)

Once the power dissipated in the driver is determined,

the driver junction temperature rise with respect to the

device lead can be evaluated using thermal equation:

CJLTOTALJ

T P T 

(4)

where:

= driver junction temperature;

= thermal resistance from junction to lead; and

= lead temperature of device in application.