Data Sheet

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6
FAN3100C / FAN3100T — Single 2 A High-Speed, Low-Side Gate Driver
Electrical Characteristics
Unless otherw ise noted, V
DD
= 12 V, T
J
= -40°C to +125°C. Currents are defined as positive into the device and negative
out of the device.
Symbol Parameter Conditions Min. Typ. Max. Unit
Supply
V
DD
Operating Range 4.5 18.0 V
I
DD
Supply Current
Inputs/EN Not Connected
FAN3100C
(8)
0.20 0.35 mA
FAN3100T 0.50 0.80 mA
V
ON
Turn-On Voltage 3.5 3.9 4.3 V
V
OFF
Turn-Off Voltage 3.3 3.7 4.1 V
Inputs (FAN3100T)
V
INL_T
IN+, IN- Logic LOW Voltage, Maximum 0.8 V
V
INH_T
IN+, IN- Logic HIGH Voltage, Minimum 2.0 V
I
IN+
Non-inverting Input IN from 0 to V
DD
-1 175 µA
I
IN-
Inverting Input IN from 0 to V
DD
-175 1 µA
V
HYS
IN+, IN- Logic Hysteresis Voltage 0.2 0.4 0.8 V
Inputs (FAN3100C)
V
INL_C
IN+, IN- Logic LOW Voltage 30 %V
DD
V
INH_C
IN+, IN- Logic HIGH Voltage 70 %V
DD
I
INL
IN Current, LOW IN from 0 to V
DD
-1 175 µA
I
INH
IN Current, HIGH IN from 0 to V
DD
-175 1 µA
V
HYS_C
IN+, IN- Logic Hysteresis Voltage 17 %V
DD
Output
I
SINK
OUT Current, Mid-Voltage, Sinking
(9)
OUT at V
DD
/2,
C
LOAD
= 0.1 µF, f = 1 kHz
2.5 A
I
SOURCE
OUT Current, Mid-Voltage, Sourcing
(9)
OUT at V
DD
/2,
C
LOAD
= 0.1 µF, f = 1 kHz
-1.8 A
I
PK_SINK
OUT Current, Peak, Sinking
(9)
C
LOAD
= 0.1 µF, f = 1 kHz 3 A
I
PK_SOURCE
OUT Current, Peak, Sourcing
(9)
C
LOAD
= 0.1 µF, f = 1 kHz -3 A
t
RISE
Output Rise Time
(10)
C
LOAD
= 1000 pF 13 20 ns
t
FALL
Output Fall Time
(10)
C
LOAD
= 1000 pF 9 14 ns
t
D1
, t
D2
Output Prop. Delay, CMOS Inputs
(10)
0 – 12 V
IN
; 1 V/ns Slew Rate 7 15 28 ns
t
D1
, t
D2
Output Prop. Delay, TTL Inputs
(10)
0 – 5 V
IN
; 1 V/ns Slew Rate 9 16 30 ns
I
RVS
Output Reverse Current Withstand
(9)
500 mA
Note s:
8. Low er supply current due to inactive TTL circuitry.
9. Not tested in production.
10. See Timing Diagrams of Figure 7 and Figure 8.