Data Sheet

BC807 / BC808 — PNP Epitaxial Silicon Transistor
© 2002 Fairchild Semiconductor Corporation www.fairchildsemi.com
BC807 / BC808 Rev. 1.1.0 5
Physical Dimensions
Figure 8. 3-LEAD, SOT23, JEDEC TO-236, LOW PROFILE
LAND PATTERN
RECOMMENDATION
NOTES: UNLESS OTHERWISE SPECIFIED
A) REFERENCE JEDEC REGISTRATION
TO-236, VARIATION AB, ISSUE H.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE INCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR EXTRUSIONS.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M - 1994.
E) DRAWING FILE NAME: MA03DREV10
3
12
SEE DETAIL A
SEATING
PLANE
SCALE: 2X
GAGE PLANE
(0.55)
(0.93)
1.20 MAX
C
0.10
0.00
0.10 C
2.40±0.30
2.92±0.20
1.30
+0.20
-0.15
0.60
0.37
0.20 A B
1.90
0.95
(0.29)
0.95
1.40
2.20
1.00
1.90
0.25
0.23
0.08
0.20 MIN