Owner's manual

Chapter 4: PowerDAQ Software

PD-DIO-CBL-16 or equivalent must be used to connect PDx-DIO board

J3 connector to the PDx-DIO-STP-64 when external trigger is used.

Trigger source must be connected to the IRQC terminal on the PDx-

DIO-STP-64 via 200-Ohm current-limiting resistor. See high-speed

interrupt section for more details about IRQ handling.

External trigger is set via software using the xx_STARTTRIGx and

xx_STOPTRIGx constants ORed together with other settings in the

configuration word for the PdDOAsyncInit

/ _

PdDIAsynInit function

calls.

Every buffered example contains comments about how to use external

trigger.

External clock

Digital input and output streamed operation may be programmed to be

clocked by an external clock source. This clock must be supplied by the

customer hardware. TMR1 terminal is used as clock input for the input

streamed operations and TMR2 terminal is used for the output

streamed operations. Clock signal must be a TTL-level signal. Negative,

at least 20 nS long

Note Maximum clock frequency should not exceed 500 kHz

in the unlimited channel list mode and 1600 kHz for

the fixed channel list mode. PD-DIO-CBL-16 or

equivalent must be used to connect PDx-DIO board

J3 connector to the PDx-DIO-STP-64 when external

clock is used.

External clock is set via software using the xx_CVSTARTx constants

ORed together with other settings in the configuration word for the

PdDOAsyncInit

/ _

PdDIAsynInit function calls. See programmer manual

and examples sources for the details.

Clock source must be connected to the TMR1/2 terminal on the PDx-

DIO-STP-64 via 200-Ohm current-limiting resistor.