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OME-PIO-D56/D24 User Manual OME-PIO-D56/OME-PIO-D24 User Manual (Ver.2.
Table of Contents 1. INTRODUCTION ...........................................................................................................................3 1.1 FEATURES ....................................................................................................................................3 1.2 SPECIFICATIONS ...........................................................................................................................4 1.3 ORDER DESCRIPTION........................................
1. Introduction The OME-PIO-D56/OME-OME-PIO-D24 provides 56/24 TTL digital I/O lines. The OME-PIO-D56/OME-OME-PIO-D24 consists of one 24-bit bi-directional port, one 16-bit input port and one 16-bit output port (only for OME-PIO-D56). The 24-bit port supports three 8-bit groups PA, PB & PC. Each 8-bit group can be individually configured to function as either an input or an output. All groups using 24-bit bidirectional ports are configured as inputs upon power-up or reset.
1.2 Specifications • All inputs are TTL compatible Logic high voltage : 2.4V (Min.) Logic low voltage : 0.8V (Max.) • All outputs are TTL compatible OPTO-22 output (CON3) Sink current : 64mA (Max.) Source current : 32mA(Max.) • • • 16-channel output (CON1) Sink current : 8mA (Max.) Source current : 0.4mA(Max.
1.4 PCI Data Acquisition Family We provide a family of PCI bus data acquisition cards. These cards can be divided into three groups as follows: 1. OME-PCI-series: first generation, isolated or non-isolated cards OME-PCI-1002/1202/1800/1802/1602: multi-function family, non-isolated OME-PCI-P16R16/P16C16/P16POR16/P8R8: D/I/O family, isolated OME-PCI-TMC12: timer/counter card, non-isolated 2.
2. 2.1 Hardware configuration Board Layout CON3 DI/O Port0 Port1 Port2 PIO-D56 PIO-D24 PCI BUS 20 19 CON2 1 only for PIO-D56 D/I 2 19 CON1 20 1 D/O 2 OME-PIO-D56/PIO-D24 User Manual (Ver.2.
2.2 I/O Port Location The OME-PIO-D56/OME-PIO-D24 consists of one 24-bit bi-directional port, one 16 bit input port and one 16 bit output port (only for OME-PIO-D56). The 24-bit port supports three 8-bit groups: PA, PB & PC. Each 8-bit group can be individually configured to function as either inputs or outputs. All groups using 24-bit bidirectional ports are configured as inputs upon power-up or reset.
I/O select (Sec. 3.3.7) RESET\ (Sec. 3.3.1) disable\ Data (Sec. 3.3.8) D/I/O input Latch Clock input D/O latch CKT disable Data (Sec. 3.3.8) Buffer input Clock input D/I buffer CKT • • • • • When the RESET\ is in Low-state Æ all D/I/O operations are disabled When the RESET\ is in High-state Æ all D/I/O operation are enabled.
2.3.2 DI Port Architecture (CON2) When the PC is powered up, all DI (CON2) port operations are disabled. The RESET\ signal controls the enable/disable signal for the DI port. Refer to Sec. 3.3.1 for more information about the RESET\ signal. • • The RESET\ is in Low-state Æ all DI operations are disabled The RESET\ is in High-state Æ all DI operations are enabled RESET\ disable Data Buffer input CON2 Clock input D/I buffer CKT OME-PIO-D56/OME-PIO-D24 User Manual (Ver.2.
2.3.3 DO Port Architecture (CON1) When the PC is powered up, all DO port (CON1) operations are disabled. The RESET\ signal controls the enable/disable signal for the DI port. Refer to Sec. 3.3.1 for more information about the RESET\ signal.
2.4 Interrupt Operation All PC0, PC1, PC2 and PC3 can be used as an interrupt signal sources. Refer to Sec. 2.1 for PC0/PC1/PC2/PC3 location. The interrupt of OME-PIO-D56/OMEPIO-D24 is level-trigger & Active_High. The interrupt signal can be programmed to inverted or non-inverted state. The programming procedure is given as follows: 1. Make sure the initial level is High or Low 2. If the initial state is High Æ select the inverted signal (Sec. 3.3.6) 3.
2.4.1 Interrupt Block Diagram of OME-PIO- D56/D24 INT_CHAN_0 INT\ Level_trigger INT_CHAN_1 INT_CHAN_2 INT_CHAN_3 initial_low active_high The interrupt output signal of OME-PIO-D56/OME-PIO-D24, INT\ is Level_trigger & Active_Low. If the INT\ generates a low pulse, the OME-PIOD56/OME-PIO-D24 will interrupt the PC only once. If the INT\ is fixed in low level, the OME-PIO-D56/OME-PIO-D24 will interrupt the PC continuously. INT_CHAN_0/1/2/3 must be controlled in a pulse type signals.
2.4.2 INT_CHAN_0/1/2/3 INT_CHAN_0 (1/2/3) PC0(PC1/PC2/PC3) Inverted/Noninverted select INV0(1/2/3) Enable/Disable select EN0(1/2/3) The INT_CHAN_0 must normally be fixed in low level state and generate a high pulse to interrupt the PC. The EN0 (EN1/EN2/EN3) can be used to enable/disable the INT_CHAN_0(1/2/3) as follows : (Refer to Sec. 3.3.
2.4.3 Initial_high, active_low Interrupt source If the PC0 is a initial_high, active_low signal, the interrupt service routine should use INV0 to invert/non-invert the PC0 for high_pulse generation as follows: (Refer to DEMO4.
2.4.4 Initial_low, active_high Interrupt source If the PC0 is a initial_low, active_high signal, the interrupt service routine should use INV0 to inverted/non-inverted the PC0 for high_pulse generation as follows: (Refer to DEMO3.
2.4.5 Muliti-Interrupt Source Assume: PC0 is initial Low, active High, PC1 is initial High, active Low PC2 is initial Low, active High PC3 is initial High, active Low as follows : PC0 PC1 PC2 PC3 PC0 & PC1 are active at the same time. PC0 & PC1 are return to normal at the same time. PC2 & PC3 are active at the same time. PC2 & PC3 are return to normal at the same time. Refer to DEMO5.C for source program. All these four falling-edge & rising-edge can be detected by DEMO5.C.
void interrupt irq_service() { new_int_state=inportb(wBase+7)&0x0f; int_c=new_int_state^now_int_state; if ((int_c&0x1)!=0) { if ((new_int_state&0x01)!=0) { CNT_H1++; } else { CNT_L1++; } invert=invert^1; } if ((int_c&0x2)!=0) { if ((new_int_state&0x02)!=0) { CNT_H2++; } else { CNT_L2++; { invert=invert^2; } if ((int_c&0x4)!=0) { If ((new_int_state&0x04)!=0) { CNT_H3++; } else { CNT_L3++; } invert=invert^4; } /* /* /* /* read all interrupt state compare which interrupt signal be change INT_CHAN_0 is active
2.5 Daughter Boards 2.5.1 OME-DB-37 The OME-DB-37 is a general purpose daughter board for D-sub 37 pins, designed for an easy-wiring connection. 2.5.2 OME-DN-37 The OME-DN-37 is a general purpose daughter board for OME-DB-37 with DINRail Mounting. It is designed for easy-wiring connection.. 37pin cable OME-DN-37 2.5.3 OME-DB-8125 The OME-DB-8125 is a general purpose screw terminal board. It is designed for easy wire connection.
2.5.4 OME-ADP-20/PCI The OME-ADP-20/PCI is an extender for 20-pin header. One side of OMEADP-20/PCI connects to a 20-pin header. The other side mounts on the PC chassis as follows: NOTE: Please choose the suitable extender for your application OME-PIO-D56/OME-PIO-D24 User Manual (Ver.2.
2.5.5 OME-DB-24PD Isolated Input Board The OME-DB-24PD is a 24 channel isolated digital input daughter board. The optically isolated inputs of the OME-DB-24PD consist of a bi-directional optocoupler with a resistor for current sensing. Use the OME-DB-24PD to sense DC signals from TTL levels up to 24V or use the OME-DB-24PD to sense a wide range of AC signals.
2.5.6 OME-DB-24RD Relay Board The OME-DB-24RD, a 24 channel relay output board, consists of 24 form C relays for efficient, programmable load switching. The relays are energized by applying a 12V/24V signal to the appropriate relay channel on the 50-pin flat connector. There are 24 enunciator LEDs for each relay which light when their associated relay is activated. Form C Relay Normal Open Normal Close Com OME-PIOD56/PIO-D24 OME-DB-24RD Note: Channel : 24 Form C Relay Relay: Switch up to 0.
2.5.7 OME-DB-24PRD, OME-DB-24POR, OME- DB-24C OME-DB-24PRD 24*power relay, 5A/250V OME-DB-24POR 24*photo MOS relay, 0.1A/350VAC OME-DB-24C 24*open collector, 100mA per channel, 30V max. The OME-DB-24PRD, a 24-channel power relay output board, consists of 8 form C and 16 form A electromechanical relays for efficient, programmable load control. The contact of each relay can control a 5A load at 250ACV/30VDCV.
2.5.
2.6 Pin Assignment CON3: 37 pin of D-type female connector. Pin Number Description Pin Number Description 1 N.C. 20 VCC 2 N.C. 21 GND 3 P1B7 22 P2C7 4 P1B6 23 P2C6 5 P1B5 24 P2C5 6 P1B4 25 P2C4 7 P1B3 26 P2C3 8 P1B2 27 P2C2 9 P1B1 28 P2C1 10 P1B0 29 P2C0 11 GND 30 P0A7 12 N.C. 31 P0A6 13 GND 32 P0A5 14 N.C. 33 P0A4 15 GND 34 P0A3 16 N.C.
CON2 : 20-pin header (only for OME-PIO-D56) Pin Number Description Pin Number Description 1 DI0 2 DI1 3 DI2 4 DI3 5 DI4 6 DI5 7 DI6 8 DI7 9 DI8 10 DI9 11 DI10 12 DI11 13 DI12 14 DI13 15 DI14 16 DI15 17 GND 18 GND 19 Vcc 20 +12V CON1 : 20-pin header (only for OME-PIO-D56) Pin Number Description Pin Number Description 1 DO0 2 DO1 3 DO2 4 DO3 5 DO4 6 DO5 7 DO6 8 DO7 9 DO8 10 DO9 11 DO10 12 DO11 13 DO12 14 DO13 15 DO14 16 DO15 17 G
3. I/O Control Register 3.1 How to Find the I/O Address The plug & play BIOS will assign a proper I/O address to every OME-PIO/PISO series card in the power-up stage. The IDs of the cards are given below: OME-PIO-D24 < REV 1.0 ~ REV 5.0 > : • Vendor ID = 0xE159 • Device ID = 0x0002 • Sub-vendor ID = 0x80 • Sub-device ID = 0x01 • Sub-aux ID = 0x40 The sub IDs of OME-PIO-D56 < REV 1.0 ~ REV 4.
3.1.1 PIO_DriverInit PIO_DriverInit(&wBoards, wSubVendor,wSubDevice,wSubAux) • wBoards=0 to N Æ number of boards found in this PC • wSubVendor Æ subVendor ID of board to find • wSubDevice Æ subDevice ID of board to find • wSubAux Æ subAux ID of board to find This function can detect all OME-PIO/PISO series card in the system. It is implemented based on the PCI plug & play mechanism. It will find all OMEPIO/PISO series cards installed in this system & save all their resource information in the library.
Sample program 2: find all OME-PIO/PISO in this PC (refer to Sec. 4.
The sub-IDs of OME-PIO/PISO series card are given as following: OME-PIO/PISO series card Description Sub_vendor Sub_device OME-PIO-D144 (Rev 4.0) 144 * D/I/O 5C80 01 OME-PIO-D96 (Rev 4.0) 96 * D/I/O 5880 01 OME-PIO-D64 (Rev 2.0) 64 * D/I/O 4080 01 OME-PIO-D56 (Rev 6.0) 24* D/I/O + C080 01 16*D/I + 16*D/O OME-PIO-D48 (Rev 2.0) 48*D/I/O 0080 01 OME-PIO-D24 (Rev 6.0) 24*D/I/O C080 01 OME-PIO-821 Multi-function 80 03 OME-PIO-DA16 (Rev 4.0) 16*D/A 4180 00 OME-PIO-DA8 (Rev 4.0) 8*D/A 4180 00 OME-PIO-DA4 (Rev 4.
3.1.2 PIO_GetConfigAddressSpace PIO_GetConfigAddressSpace(wBoardNo,*wBase,*wIrq, *wSubVendor, *wSubDevice,*wSubAux,*wSlotBus, *wSlotDevice) • wBoardNo=0 to N Æ totally N+1 boards found by PIO_DriveInit(….
3.1.3 Show_PIO_PISO Show_PIO_PISO(wSubVendor,wSubDevice,wSubAux) • wSubVendor Æ subVendor ID of board to find • wSubDevice Æ subDevice ID of board to find • wSubAux Æ subAux ID of board to find This function will output a text string for this special subIDs. This text string is the same as that defined in PIO.
3.2 The Assignment of I/O Address The plug & play BIOS will assign the proper I/O address to the OMEPIO/PISO series card. If there is only one OME-PIO/PISO board, the user can identify the board as card_0. If there are two PIO/PISO boards in the system, the user will be very difficult to identify which board is card_0? The software driver can support 16 boards max. Therefore the user can install 16 boards of PIO/PSIO series in one PC system.
3.3 The I/O Address Map The I/O address of OME-PIO/PISO series card is automatically assigned by the main board ROM BIOS. The I/O address can also be reassigned by user. Users are strongly recommended to change the autoassigned I/O address. The plug & play BIOS will assign proper I/O address to each OME-PIO/PISO series card very well.
3.3.1 RESET\ Control Register (Read/Write): wBase+0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved Reserved Reserved Reserved Reserved Reserved Reserved RESET\ Note. Refer to Sec. 3.1 for more information about wBase. When the PC is first powered up, the RESET\ signal is in Low-state. This will disable all D/I/O operations. The user has to set the RESET\ signal to High-state before any D/I/O command.
3.3.4 INT Mask Control Register (Read/Write): wBase+5 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 0 0 0 EN3 EN2 EN1 EN0 Note. Refer to Sec. 3.1 for more information about wBase. EN0=0Æ disable PC0 as a interrupt signal (default) EN0=1Æ enable PC0 as a interrupt signal outportb(wBase+5,0); outportb(wBase+5,1); outportb(wBase+5,0x0f); 3.3.
3.3.6 Interrupt Polarity Control Register (Read/Write): wBase+0x2A Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 0 0 0 INV3 INV2 INV1 INV0 Note. Refer to Sec. 3.1 for more information about wBase.
3.3.8 Read/Write 8-bit data Register (Read/Write):wBase+0xc0/0xc4/0xc8/0xd0/0xd4 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 D7 D6 D5 D4 D3 D2 D1 D0 Note. Refer to Sec. 3.1 for more information about wBase. There are five/three 8-bit I/O ports in the OME-PIO-D56/OME-PIO-D24. Each port is easy to read/write to by access to their own data registers.
4. Demo program It is recommended to read the release notes first. Important information will be given in release note as follows: 1. Where you can find the software driver & utility? 2. How to install software & utility? 3. Where is the diagnostic program? 4. FAQs There are many demo programs available on the software floppy disk or CD. After the software installation, the driver will be installed into disk as follows: • • \TC\*.* \MSC\*.* Æ for Turbo C 2.xx or above Æ for MSC 5.xx or above • \BC\*.
4.1 /* /* /* /* /* PIO_PISO -----------------------------------------------------------Find all PIO_PISO series cards in this PC system step 1 : plug all PIO_PISO cards into PC step 2 : run PIO_PISO.EXE ------------------------------------------------------------ */ */ */ */ */ #include "PIO.
4.1.1 PIO_PISO.EXE for Windows User can find this utility in the company CD or floppy disk. It is useful for all OME-PIO/PISO series card. After executing the utility, detailed information for all OME-PIO/PISO cards that installed in the PC will be show as follows: OME-PIO-D56/PIO-D24 User Manual (Ver.2.
4.2 DEMO1 /* demo 1 : D/O demo of CON3 /* step 1 : connect a OME-DB-24C to CON3 of OME-PIO-D56/D24 /* step 2 : run DEMO1.EXE /* step 3 : LEDs of OME-DB-24C will turn on sequentially /* -------------------------------------------------------------#include "PIO.
4.3 /* /* /* /* /* /* /* DEMO2 demo 2 : DI/O demo of CON1, CON2 & CON3 step 1 : connect OME-DB-24P to CON3 of OME-PIO-D56/D24 : connect CON1 t0 CON2 of OME-PIO-D56 step 2 : run DEMO2.EXE step 3 : check the information on screen D/I will same as D/O : check the result on screen will same as CON3 input -------------------------------------------------------------- */ */ */ */ */ */ */ #include "PIO.
4.4 DEMO3 /* demo 3 : Count high pulse of PC0 /* (initial Low & active High) /* step 1 : run DEMO3.EXE /* -------------------------------------------------------------- */ */ */ */ #include "PIO.
irqmask=inportb(A1_8259+1); outportb(A1_8259+1,irqmask & 0xff ^ (1<
4.5 DEMO4 /* demo 4 : Count high pulse of PC0 /* (initial High & active Low) /* step 1 : run DEMO4.EXE /* -------------------------------------------------------------- */ */ */ */ #include "PIO.
} else { irqmask=inportb(A1_8259+1); outportb(A1_8259+1,irqmask & 0xfb); irqmask=inportb(A2_8259+1); outportb(A2_8259+1,irqmask & 0xff ^ (1<<(wIrq-8))); setvect(wIrq-8+0x70,irq_service); } outportb(wBase+5,1); now_int_state=1; outportb(wBase+0x2a,0); enable(); } /* IRQ2 */ /* enable interrupt (PC0) /* now ini_signal is high /* select the inverte void interrupt irq_service() { if (now_int_state==1) /* now PC0 change to low { /* INT_CHAN_0 = !PC0 COUNT++; if ((inportb(wBase+7)&1)==0) /* PC0 still fixed in
4.6 DEMO5 /* demo 5 : Four interrupt source /* PC0 : initial Low , active High /* PC1 : initial High , active Low /* PC2 : initial Low , active High /* PC3 : initial High , active Low /* step 1 : run DEMO5.EXE /* -------------------------------------------------------------- */ */ */ */ */ */ */ #include "PIO.
if (wIrq<8) { irqmask=inportb(A1_8259+1); outportb(A1_8259+1,irqmask & 0xff ^ (1<
else /* { CNT_L2++; } invert=invert^2; /* } if ((int_c&0x4)!=0) { if ((new_int_state&0x4)!=0)/* { CNT_H3++; } else /* { CNT_L3++; } invert=invert^4; /* } if ((int_c&0x8)!=0) { if ((new_int_state&0x8)!=0)/* { CNT_H4++; } else /* { CNT_L4++; } invert=invert^8; /* } now_int_state=new_int_state; outportb(wBase+0x2a,invert); now PC1 is change to low */ to generate a high pulse */ /* INT_CHAN_2 is active */ now PC2 is change to high */ now PC2 is change to low */ to generate a high pulse */ /* INT_CH
WARRANTY/DISCLAIMER OMEGA ENGINEERING, INC. warrants this unit to be free of defects in materials and workmanship for a period of 13 months from date of purchase. OMEGA’s WARRANTY adds an additional one (1) month grace period to the normal one (1) year product warranty to cover handling and shipping time. This ensures that OMEGA’s customers receive maximum coverage on each product. If the unit malfunctions, it must be returned to the factory for evaluation.
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