Datasheet

2003 Apr 10 66
NXP Semiconductors Preliminary specification
Stereo audio codec with SPDIF interface UDA1355H
Notes
1. All power supply pins (V
DD
and V
SS
) must be connected to the same external power supply unit.
2. When the DAC must drive a higher capacitive load (above 50 pF), then a series resistor of 100 Ω must be used in
order to prevent oscillations in the output.
16 TIMING CHARACTERISTICS
V
DD
= 2.7 to 3.6 V; T
amb
= −20 to +85 °C; R
L
=5kΩ; unless otherwise specified.
IEC 60958 inputs
V
i(p-p)
input voltage (peak-to-peak
value)
0.2 0.5 3.3 V
R
i
input resistance − 6 − kΩ
V
hys
hysteresis voltage − 40 − mV
I
DD(diff)
I
DD(DAC,input)
/I
DD(DAC,no input)
− tbf −−
Power consumption
P
tot
total power consumption IEC 60958 input; f
s
=48kHz
DAC in playback mode − 74 − mW
DAC in Power-down mode − 63 − mW
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Device reset
t
rst
reset time − 250 −μs
PLL lock time
t
lock
time-to-lock f
s
=32kHz − 85.0 − ms
f
s
=44.1kHz − 63.0 − ms
f
s
=48kHz − 60.0 − ms
f
s
=96kHz − 40.0 − ms
I
2
S-bus interface (see Fig.20)
T
cy(BCK)
bit clock period
1
/
128fs
−−ms
t
BCKH
bit clock HIGH time 30 −−ns
t
BCKL
bit clock LOW time 30 −−ns
t
r
rise time −−20 ns
t
f
fall time −−20 ns
t
su(DATAI)
data input set-up time 10 −−ns
t
h(DATAI)
data input hold time 10 −−ns
t
d(DATAO-BCK)
data output to bit clock
delay
−−30 ns
t
d(DATAO-WS)
data output to word
select delay
−−30 ns
t
h(DATAO)
data output hold time 0 −−ns
t
su(WS)
word select set-up time 10 −−ns
t
h(WS)
word select hold time 10 −−ns
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT