Datasheet

2003 Apr 10 41
NXP Semiconductors Preliminary specification
Stereo audio codec with SPDIF interface UDA1355H
Table 26 Description of register bits (address 00H)
Table 27 Crystal oscillator output frequencies
BIT SYMBOL DESCRIPTION
15 EXPU EXPU. Bit EXPU is reserved for manufacturers evaluation and should be kept
untouched for normal operation of UDA1355H.
14 − reserved
13 PON_XTALPLL Power control crystal oscillator and PLL. If this bit is logic 0, then the crystal
oscillator and PLL are turned off; if this bit is logic 1, then the crystal oscillator and PLL
are running.
12 to 8 XTL_DIV[4:0] Crystal oscillator clock divider setting. Value to select the sampling frequency and
the system clock output frequency (256f
s
or 384f
s
). When 256f
s
is selected, the master
BCKI and BCKO clock frequency of digital interface running with crystal oscillator clock
will be 64f
s
; when 384f
s
is selected, it will be 48f
s
(see Table 27).
7to4 MODE[3:0] Microcontroller application mode setting. Value to select the microcontroller
application mode (see Table 28).
3ws_detct_EN Word select detector enable.If this bit is logic 0, then WS detector is disabled; if this
bit is logic 1, then WS detector is enabled.
2ws_detct_set Word select detector limit setting. If this bit is logic 0, then the lower frequency limit
of the WS detector is 4095 clock cycles (3 kHz); if this bit is logic 1, then the lower
frequency limit of the WS detector is 2047 clock cycles (6 kHz).
1 and 0 CLKOUT_SEL[1:0] Clock output select. If these bits are 00 or 10, then the BCKI and BCKO clock
frequency of digital interface running with FPLL clock will be 64f
s
; otherwise, it will be
48f
s
. The selection between 256f
s
and 384f
s
for the crystal clock output is set via the
bits XTL_DIV[4:0]:
00 = FPLL clock 256f
s
01 = FPLL clock 384f
s
10 = crystal clock
11 = crystal clock
XTL_DIV4 XTL_DIV3 XTL_DIV2 XTL_DIV1 XTL_DIV0 OUTPUT RATE
Based on 32 kHz
00000256× 16 kHz
00001384× 16 kHz
00010256× 32 kHz
00011384× 32 kHz
00100256× 64 kHz
00101384× 64 kHz
Based on 44.1 kHz
00110256× 22.05 kHz
00111384× 22.05 kHz
01000256× 44.1 kHz
01001384× 44.1 kHz
01010256× 88.2 kHz
01011384× 88.2 kHz