Datasheet

2003 Apr 10 28
NXP Semiconductors Preliminary specification
Stereo audio codec with SPDIF interface UDA1355H
In the microcontroller mode, more features are available. The application modes are given in Table 14. Some modes are
the same in terms of data path as for the static mode. These modes are already explained in Section 8.2. Some modes
are combined into one mode (like modes 4 and 5).
Table 14 Overview of microcontroller modes
MODE FEATURE SCHEMATIC
0 See static mode
1 See static mode
2 Data path:
• Inputs ADC, I
2
S and SPDIF to outputs
DAC, I
2
S or SPDIF.
Features:
• All clocks are related to the SPDIF
clock
• I
2
S input and output have master BCK
and WS
• SPDIF input channel status bits (two
times 40) can be read
• Output SPDIF supported but the timing
not according to level II: depends on
I
2
S-bus clock
• Output SPDIFOUT loop through can
be selected with independent SPDIF
input channel select.
3 See static mode
4 + 5 Data path:
• Inputs ADC and I
2
S to outputs DAC,
I
2
S or SPDIF.
Features:
• Mode 4 and 5 are combined in
microcontroller mode
• Crystal oscillator generates the clocks
• I
2
S input and output have master BCK
and WS
• SPDIF output channel status bits (two
times 40) setting.
ADC
MGU847
SPDIF IN
MUTE
I
2
S OUTPUT
I
2
S master
PLL
SPDIF LOCK
DAC
I
2
S slave
EXTERNAL DSP
(e.g. equalizing, spatializing)
(SAA7715)
I
2
S INPUT
SPDIF OU
T
SPDIF
OUT
SPDIF OUT
ADC
MGU848
MUT
E
I
2
S OUTPUT
I
2
S master
XTAL
DAC
I
2
S slave
EXTERNAL DSP
(e.g. equalizing, spatializing)
(SAA7715)
I
2
S INPUT