Datasheet

2003 Apr 10 22
NXP Semiconductors Preliminary specification
Stereo audio codec with SPDIF interface UDA1355H
2 Data path:
• Input SPDIF to outputs I
2
S or
SPDIFOUT via loop through
• Input I
2
S to output DAC.
Features:
• Possibility to process input SPDIF via
I
2
S-bus using an external DSP and
then to output DAC
• System locks onto the SPDIF input
signal
• I
2
S input and output with BCK and WS
are master
• Microcontroller mode: see Section 8.4.
3 Data path:
• Input ADC to outputs I
2
S or SPDIF.
Features:
• Crystal oscillator generates the clocks
• Microcontroller mode:
– PGA gain setting
– Volume control in decimator setting
– SPDIF output channel status bits
(two times 40 bits) setting.
4 Data path:
• Input ADC to output I
2
S
• Input I
2
S to outputs DAC or SPDIF.
Features:
• Possibility to process input ADC via
I
2
S-bus using a external DSP and then
to outputs DAC or SPDIF
• Crystal oscillator generates the clocks
• I
2
S input and output with BCK and WS
are master
• Microcontroller mode: see Section 8.4.
MODE FEATURES SCHEMATIC
MGU838
SPDIF IN
SPDIFOU
T
MUTE
I
2
S OUTPUT
I
2
S master
PLL
SPDIF LOCK
DAC
I
2
S slave
EXTERNAL DSP
(e.g. equalizing, spatializing)
(SAA7715)
I
2
S INPUT
I
2
S mast
er
SPDIF OUT
MGU839
I
2
S OUTPUT
XTAL
ADC
SPDIF OUT
MGU840
MUT
E
I
2
S OUTPUT
I
2
S master
XTAL
DAC
ADC
I
2
S slave
EXTERNAL DSP
(e.g. equalizing, spatializing)
(SAA7715)
I
2
S INPUT