Datasheet

2003 Apr 10 21
NXP Semiconductors Preliminary specification
Stereo audio codec with SPDIF interface UDA1355H
The first 11 application modes are given in this section. Schematic diagrams of these application modes are given in
Table 11. In this table the basic features are mentioned and also the extra features in case of microcontroller mode are
given. It should be noted that the blocks running at the crystal clock (XTAL) are marked unshaded while the blocks
running at the PLL clock are shaded.
Table 11 Overview of static mode basic applications
MODE FEATURES SCHEMATIC
0 Data path:
• Input SPDIF to outputs DAC, I
2
S or
SPDIFOUT via loop through.
Features:
• System locks onto the SPDIF input
signal
• BCK and WS are master
• Microcontroller mode:
– DAC sound features can be used
– SPDIF input channel status bits
(two times 40 bits) can be read.
1 Data path:
• Input I
2
S to outputs DAC or SPDIF
(level II not guaranteed: depends on
I
2
S-bus clock).
Features:
• System locks onto the WSI signal
• BCKI and WSI are slave
• Microcontroller mode:
– DAC sound features can be used
– SPDIF output channel status bits
(two times 40 bits) setting.
MGU836
SPDIF IN
SPDIFOU
T
MUTE
I
2
S OUTPUT I
2
S maste
r
PLL
SPDIF LOCK
DAC
I
2
S slave
MGU837
I
2
S INPUT
MUT
E
SPDIF OUT
PLL
I
2
S LOCK
DAC