Datasheet

2003 Apr 10 14
NXP Semiconductors Preliminary specification
Stereo audio codec with SPDIF interface UDA1355H
handbook, full pagewidth
MGU833
IEC 60958
ENCODER
IEC 60958
DECODER
SLICER
SLICER_SEL
[
1:0
]
MODE
[
2:0
]
SEL_STATIC
select
SPDIF source
SPDIF OUT
SPDOUT_SEL1
SPDOUT_SEL0
SPDIF
source
23
24
25
26
SPDIF0
SPDIF1
SPDIF2
SPDIF3
21, 22
SPDOUT_SEL2
MODE
[
3:0
]
17 to 19 20
5
UDA1355H
Fig.6 Selection options for SPDIF output.
7.6 Analog input
7.6.1 ADC
The analog input is equipped with a Programmable Gain
Amplifier (PGA) which can be controlled via the
microcontroller interface. The control range is from
0 to 24 dB gain in 3 dB steps independent for the left and
right channels.
In applications in with a 2 V (RMS) input signal, a 12 kΩ
resistor must be used in series with the input of the ADC.
The 12 kΩ resistor forms a voltage divider together with
the internal ADC resistor and ensures that the voltage,
applied to the input of the IC, never exceeds 1 V (RMS).
In the application for a 2 V (RMS) input signal, the PGA
must be set to 0 dB. When a 1 V (RMS) input signal is
applied to the ADC in the same application, the PGA gain
must be set to 6 dB.
An overview of the maximum input voltages allowed with
and without an external resistor and the PGA gain setting
is given in Table 5.
Table 5 Maximum input voltage; V
DD
=3V
7.6.2 D
ECIMATION
The decimation from 64f
s
is performed in two stages: comb
filter and decimation filter. The first stage realizes a
fourth-order characteristic with a decimation factor
of eight. The second stage consists of three half-band
filters each decimating by a factor of two. Table 6 shows
the characteristics.
Table 6 Decimation filter characteristics
Note
1. The output is not 0 dB when V
I(rms)
=1V at V
DD
=3V.
This is because the analog components can spread
over the process. When there is no external resistor,
the −1.16 dB scaling prevents clipping caused by
process mismatch.
In the ADC path there are left and right independent digital
volume controls with a range from +24 to −63.5 dB
and −∞ dB. This volume control is also used as a digital
linear mute that can be used to prevent plops when
powering-up or powering down the ADC front path.
EXTERNAL
RESISTOR
(12 kΩ)
PGA GAIN
SETTING
MAXIMUM
INPUT
VOLTAGE
Present 0 dB 2 V (RMS)
6dB 1V(RMS)
Absent 0 dB 1 V (RMS)
6dB 0.5V(RMS)
ITEM CONDITIONS VALUE (dB)
Pass-band ripple 0 to 0.45f
s
±0.02
Stop band >0.55f
s
−60
Dynamic range 0 to 0.45f
s
140
Overall gain from ADC
input to digital output
DC; V
I
=0dB;
note 1
−1.16
sin x
x
------------