Datasheet
2003 Apr 10 10
NXP Semiconductors Preliminary specification
Stereo audio codec with SPDIF interface UDA1355H
handbook, full pagewidth
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UDA1355H
MGU828
V
ADCN
V
ADCP
MP2
MP1
V
SSIS
V
DDI
SPDIF3
SPDIF2
SPDIF1
SPDIF0
BCKI
WSI
DATAI
LOCK
SPDIFOUT
V
DDE
DATAO
WSO
CLK_OUT
MP0
RTCB
VOUT
R
V
SSA
1
VOUT
L
V
DDA
1
V
REF
VINR
V
SSA2
VINL
MUTE
V
DDA
2
XTALIN
XTALOUT
V
SSX
RESET
MODE0
MODE1
SEL_STATIC
S
LICER_SEL0
S
LICER_SEL1
V
DDX
MODE2
V
SSE
BCKO
Fig.2 Pin configuration.
7 FUNCTIONAL DESCRIPTION
7.1 IC control
The UDA1355H can be controlled either via static pins or
via the microcontroller serial hardware interface being the
I
2
C-bus with a clock up to 400 kHz or the L3-bus with a
clock up to 2 MHz. It is recommended to use the
microcontroller interface since this gives full access to all
the IC features.
The two microcontroller interfaces only differ in interface
format. The register addresses and features that can be
controlled are identical for L3-bus mode and I
2
C-bus
mode.
The UDA1355H can operate in three control modes:
• Static mode with limited features
• L3-bus mode with full featuring
• I
2
C-bus mode with full featuring.
The modes are selected via the 3-level pin SEL_STATIC
according to Table 2.
Table 2 Control mode selection via pin SEL_STATIC
7.2 Microcontroller interface
The UDA1355H has a microcontroller interface and all the
sound processing features and system settings can be
controlled by the microcontroller.
The controllable settings are:
• Restoring L3-bus defaults
• Power-on settings for all blocks
• Digital interface input and output formats
• Volume settings for the decimator
• PGA gain settings
LEVEL MODE
HIGH static mode
MID I
2
C-bus mode
LOW L3-bus mode