Datasheet
QorIQ T4240RDB
Board Features
Processor
• QorIQ T4240 processor, 1.67 GHz core
with 1866 MT/s DDR3 data rate
• Multiple SysClk inputs for generating
various device frequencies
Memory
• Three unbuffered DDR3 240-pin uDIMM
modules with ECC (72-bit bus), 6 GB
memory, 1866 MT/s data rate
• 128 MB NOR flash, 16-bit
• 2 GB SLC NAND flash
• 2 KB 24C02 I
2
C EEPROM
• SD connector to interface
PCI Express
®
• PCIe x4 connector
• PCIe x8 connector
USB 2.0
• Dual Type-A USB slot, connected to
USB PHY
Ethernet
• Four 10 GB/s SFP+ ports
• LAN1–LAN8: Connected to SGMII
PHY-VSC8664
Others
• LEDs for power and Ethernet link and
active
• JTAG for debugging
• I
2
C
Serial EEPROM: Board identification
Real-time clock
• ATX power supply
The T4240RDB supports two PCI Express
®
slots, as well as an SD/MMC card slot
and two USB 2.0 receptacles. These
components, integrated with the T4 family,
provide an application-specific platform that
can help you get a jump start on your next
design. The T4240RDB memory supports
6 GB of DDR3 at 1866 MHz, 128 MB of
NOR flash, a 2 GB NAND flash and a 2 KB
I
2
C EEPROM.
The T4240RDB is pre-loaded with the
Embedded Linux
®
Essentials for QorIQ
processors with data path acceleration
software development kit. This kit includes
a 64-bit SMP Linux kernel, hugetlbfs for
applications with a large memory footprint,
user space Data Path Acceleration
Architecture (DPAA) for high-performance
packet handling, u-boot, the GCC tool chain
and virtualization support, among many other
features. This board is also available from
Nexcom in production volumes. For more
information, visit nexcom.com/#QorIQ.
About the T4 Processor
The T4240 processor contains the
e6500 core, built on Power Architecture
®
technology, offering speeds of 1500–1800
MHz. It has a three-level cache hierarchy
with 32 KB of instruction and data cache
per core, 6 MB L2 cache clustered in banks
of four cores allowing efficient sharing of
code and data within a multicore cluster,
and a 1.5 MB CoreNet platform cache. I/O
includes 32 SerDes lanes running at up to
10 GHz, multiplexed across four PCI Express
controllers (up to two at Gen3), up to four
10 Gigabit Ethernet interfaces (XFI, XAUI,
10Gbase-KR or HiGig), up to 16
1 Gigabit Ethernet interfaces (SGMII and
RGMII), two Serial RapidIO
®
2.0 controllers
and two SATA 2.0 interfaces.
The T4240 processor supports three 64-bit
DDR3 and DDR3L (low power) SDRAM
memory controllers with ECC support
running at up to 1867 MHz data rate. It
includes two USB 2.0 interfaces (including
PHY), an SD/MMC interface, a NOR/NAND
controller, four I2C and SPI. It also includes
the accelerator blocks collectively known
as the DPAA that offload various tasks from
the core, including routine packet handling,
security algorithm calculations, compression,
decompression and pattern matching. In
addition, each e6500 core implements the
Freescale AltiVec technology SIMD engine,
which achieves DSP-like performance for
math-intensive applications.
In addition to the 24-threaded T4240
processor, the QorIQ T4 family also includes
the 16-threaded T4160 and the 8-threaded
T4080 processors. These three family
members offer a performance scaling factor
of 3x within a pin compatible package. The
T4240RDB can be configured to look like a
T4160 or T4080 reference design board.
For more information visit freescale.com/QorlQ
Freescale, the Freescale logo, AltiVec and QorIQ are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. CoreNet
is a trademark of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. The
Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are trademarks and service
marks licensed by Power.org. © 2014 Freescale Semiconductor, Inc.
Document Number: T4240RDBFS REV 2