Datasheet

Table 40. Revision History
Rev. No. Date Substantial Changes
• Updated note 'All the limits defined ... '
• Updated parameter 'I
INJPAD_DC_ABS
', 'V
IN_DC
', I
INJSUM_DC_ABS
.
• In Table 2,
• Updated parameter I
INJPAD_DC_OP
and I
INJSUM_DC_OP
.
• In Table 5, updated TBDs for V
LVR_HYST
, V
LVD_HYST
, and
VLVW_HYST
• In Table 6,
• Added VLPR → VLPS
• Added VLPS → VLPR
• Updated TBDs for VLPS → Asynchronous DMA Wakeup, STOP1 →
Asynchronous DMA Wakeup, and STOP2 → Asynchronous DMA
Wakeup
• In Table 7, updated the specifications for S32K144.
• Updated the attachment S32K1xx_Power_Modes _Configuration.xlsx.
• In Table 13, removed C
IN_A
.
• In Table 15,
• Updated specificatins for g
mXOSC
.
• Removed I
DDOSC
• In Table 17,
• Added parameter ΔF125.
• Removed I
DDFIRC
• In Table 18,
• Added parameter ΔF125.
• Removed I
DDSIRC
• In Table 19, removed I
LPO
• Updated section: Flash memory module (FTFC) electrical specifications
• In section: 12-bit ADC operating conditions,
• Updated TBDs for I
DDA_ADC
and TUE in Table 25
• Updated TBDs for I
DDA_ADC
and TUE in Table 26
• In section: QuadSPI AC specifications, updated figure 'QuadSPI output
timing (HyperRAM mode) diagram'.
• In section: 12-bit ADC operating conditions, updated Table 24.
• In section: CMP with 8-bit DAC electrical specifications, added note 'For
comparator IN signals adjacent ... '
• In table: Table 29, minor update in footnote 6.
• In table: Table 38, updated specifications for S32K146.
Revision History
S32K1xx Data Sheet, Rev. 4, 06/2017
NXP Semiconductors
Preliminary
69