Datasheet

2
10
6 7
MSB IN
BIT 6 . . . 1
SLAVE MSB
SLAVE LSB OUT
11
5
5
3
8
4
13
12
12
11
SEE
NOTE
13
9
see
note
(INPUT)
(CPOL=0)
SPSCK
SPSCK
(CPOL=1)
SS
(INPUT)
(INPUT)
MOSI
(INPUT)
MISO
(OUTPUT)
LSB IN
BIT 6 . . . 1
Figure 20. LPSPI slave mode timing (CPHA = 0)
2
6 7
MSB IN
BIT 6 . . . 1
MSB OUT SLAVE LSB OUT
5
5
10
12 13
3
12 13
4
SLAVE
8
9
see
note
(INPUT)
(CPOL=0)
SPSCK
SPSCK
(CPOL=1)
SS
(INPUT)
(INPUT)
MOSI
(INPUT)
MISO
(OUTPUT)
11
LSB IN
BIT 6 . . . 1
Figure 21. LPSPI slave mode timing (CPHA = 1)
6.5.3
LPI2C electrical specifications
See General AC specifications for LPI2C specifications.
For supported baud rate see section 'Chip-specific LPI2C information' of the Reference
Manual.
Communication modules
S32K1xx Data Sheet, Rev. 4, 06/2017
48
Preliminary
NXP Semiconductors