Datasheet

Table 22. NVM reliability specifications (continued)

Symbol Description Min. Typ. Max. Unit Notes

nvmretp1k

Data retention after up to 1 K cycles 20 — — years

nvmcycp

Cycling endurance 1 K — — cycles 2, 1

When using FlexMemory feature: FlexRAM as Emulated EEPROM

nvmretee

Data retention 5 — — years

nvmwree16

nvmwree256

Write endurance

• EEPROM backup to FlexRAM ratio = 16

• EEPROM backup to FlexRAM ratio = 256

100 K

1.6 M

—

writes

3, 4, 5

1. Program and Erase for PFlash and DFlash are supported across product temperature specification in Normal Mode (not

supported in HSRUN mode).

2. Cycling endurance is per DFlash or PFlash Sector.

3. FlexMemory write endurance specified for 16-bit and/or 32-bit writes to FlexRAM and is supported across standard

temperature specification in Normal Mode (not supported in HSRUN mode). Greater write endurance may be achieved

with larger ratios of EEPROM backup to FlexRAM.

4. For usage of any other EEE driver other than the FlexMemory feature, the endurance specification will fall back to the

specified endurance value of the D-Flash specification (1 K).

5. EEE calculator tool is available at NXP web site to help estimate the maximum write endurance achievable at specific

EEPROM/FlexRAM ratio. The “In Spec” portions of the online calculator refer to the NVM reliability specifications section of

data sheet. This calculator is only applies to the FlexMemory feature.

6.3.2 QuadSPI AC specifications

The following table describes the QuadSPI electrical characteristics.

• Measurements are with maximum output load of 25 pF, input transition of 1 ns and

pad configured with fastest slew settings (DSE = 1'b1).

• I/O operating voltage ranges from 2.97 V to 3.6 V

• While doing the mode transition (RUN -> HSRUN or HSRUN -> RUN ), the

interface should be OFF.

• Add 50 ohm series termination on board in QuadSPI SCK for Flash A to avoid loop

back reflection when using in Internal DQS (PAD Loopback) mode.

• For non-Quad mode of operation if external device doesn’t have pull-up feature,

external pull-up needs to be added at board level for non-used pads.

• With external pull-up, performance of the interface may degrade based on load

associated with external pull-up.

Memory and memory interfaces

S32K1xx Data Sheet, Rev. 4, 06/2017

Preliminary

NXP Semiconductors