Datasheet

System Clock Generation (SCG) specifications
6.2.3.1 Fast internal RC Oscillator (FIRC) electrical specifications
Table 17. Fast internal RC Oscillator electrical specifications
Symbol Parameter
1
Value Unit
Min. Typ. Max.
F
FIRC
FIRC target frequency — 48 — MHz
ΔF Frequency deviation across process, voltage, and
temperature < 105°C
— ±0.5 ±1 %F
FIRC
ΔF125 Frequency deviation across process, voltage, and
temperature < 125°C
— ±0.5 ±1.1 %F
FIRC
T
Startup
Startup time 3.4 5 µs
2
T
JIT
, 3
Cycle-to-Cycle jitter — 250 500 ps
T
JIT
3
Long term jitter over 1000 cycles — 0.04 0.1 %F
FIRC
1. With FIRC regulator enable
2. Startup time is defined as the time between clock enablement and clock availability for system use.
3. FIRC as system clock
NOTE
Fast internal RC Oscillator is compliant with CAN and LIN
standards.
6.2.3.2
Slow internal RC oscillator (SIRC) electrical specifications
Table 18. Slow internal RC oscillator (SIRC) electrical specifications
Symbol Parameter Value Unit
Min. Typ. Max.
F
SIRC
SIRC target frequency — 8 — MHz
ΔF Frequency deviation across process, voltage, and
temperature < 105°C
— — ±3 %F
SIRC
ΔF125 Frequency deviation across process, voltage, and
temperature < 125°C
— — ±3.3 %F
SIRC
T
Startup
Startup time — 9 12.5 µs
1
1. Startup time is defined as the time between clock enablement and clock availability for system use.
6.2.3
System Clock Generation (SCG) specifications
S32K1xx Data Sheet, Rev. 4, 06/2017
26
Preliminary
NXP Semiconductors