Datasheet

Figure 7. Input signal measurement reference
5.2 General AC specifications
These general purpose specifications apply to all signals configured for GPIO, UART,
and timers.
Table 8. General switching specifications
Symbol Description Min. Max. Unit Notes
GPIO pin interrupt pulse width (digital glitch filter
disabled) — Synchronous path
1.5 — Bus clock
cycles
1, 2
GPIO pin interrupt pulse width (digital glitch filter
disabled, passive filter disabled) — Asynchronous path
50 — ns 3
WFRST RESET input filtered pulse — 100 ns 4
WFRST RESET input not filtered pulse 100 — ns
1. This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In Stop and VLPS modes, the synchronizer is bypassed so shorter pulses can be recognized in
that case.
2. The greater of synchronous and asynchronous timing must be met.
3. These pins do not have a passive filter on the inputs. This is the shortest pulse width that is guaranteed to be recognized.
4. Minimum length of RESET pulse, guaranteed not to be filtered by the internal filter.
5.3 DC electrical specifications at 3.3 V Range
Table 9. DC electrical specifications at 3.3 V Range
Symbol Parameter Value Unit Notes
Min. Typ. Max.
V
DD
I/O Supply Voltage 2.7 3.3 4 V 1
V
ih
Input Buffer High Voltage 0.7 × V
DD
— V
DD
+ 0.3 V 2
V
il
Input Buffer Low Voltage V
SS
− 0.3 — 0.3 × V
DD
V 3
V
hys
Input Buffer Hysteresis 0.06 × V
DD
— — V
Ioh_Standard I/O current source capability measured
when pad = (V
DDE
− 0.8 V)
3.5 — — mA
Table continues on the next page...
I/O parameters
S32K1xx Data Sheet, Rev. 4, 06/2017
NXP Semiconductors
Preliminary
19