Datasheet
T
J
(Junction temperature)=125 °C. Assumes TA=105 °C for HSRUN mode
• Assumes maximum θJA for 2s2p board. See Thermal characteristics
8. 60 seconds lifetime; device in reset (no outputs enabled/toggling)
4.2 Voltage and current operating requirements
NOTE
Full functionality/specifications cannot be guaranteed when
voltage drops below 2.7 V.
Table 2. Voltage and current operating requirements 1
Symbol Description Min. Max. Unit Notes
V
DD
2
Supply voltage 2.7
3
5.5 V 4
V
DD_OFF
Voltage allowed to be developed on V
DD
pin when it is not powered from any
external power supply source.
0 0.1 V
V
DDA
Analog supply voltage 2.7 5.5 V 4
V
DD
– V
DDA
V
DD
-to-V
DDA
differential voltage – 0.1 0.1 V
V
REFH
ADC reference voltage high 2.7 V
DDA
+ 0.1 V 5
V
REFL
ADC reference voltage low -0.1 0.1 V
V
ODPU
Open drain pullup voltage level V
DD
V
DD
V 6
I
INJPAD_DC_OP
7
Continuous DC input current (positive /
negative) that can be injected into an I/O
pin
-3 +3 mA
I
INJSUM_DC_OP
Continuous total DC input current that can
be injected across all I/O pins such that
there's no degradation in accuracy of
analog modules: ADC and ACMP (See
section Analog Modules)
— 30 mA
1. Typical conditions assumes V
DD
= V
DDA
= V
REFH
= 5 V, temperature = 25 °C and typical silicon process unless otherwise
stated.
2. As V
DD
varies between the minimum value and the absolute maximum value the analog characteristics of the I/O and the
ADC will both change. See section I/O parameters and ADC electrical specifications respectively for details.
3. S32K148 will operate from 2.7 V when executing from internal FIRC. When the PLL is engaged S32K148 is guaranteed to
operate from 2.97 V. All other S32K family devices operate from 2.7 V in all modes.
4. V
DD
and V
DDA
must be shorted to a common source on PCB. Appropriate decoupling capacitors to be used to filter noise
on the supplies. See application note AN5032 for reference supply design for SAR ADC.
5. V
REFH
should always be equal to or less than V
DDA
+ 0.1 V and V
DD
+ 0.1 V
6. Open drain outputs must be pulled to V
DD
.
7. When input pad voltage levels are close to V
DD
or V
SS
, practically no current injection is possible.
General
S32K1xx Data Sheet, Rev. 4, 06/2017
10
Preliminary
NXP Semiconductors