Datasheet
Chapter 4 Memory
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor 51
Nonvolatile Flash registers, shown in Table 4-5, are located in the Flash memory. These registers include
an 8-byte backdoor key, NVBACKKEY, which can be used to gain access to secure memory resources.
During reset events, the contents of NVPROT and NVOPT in the nonvolatile register area of the Flash
memory are transferred into corresponding FPROT and FOPT working registers in the high-page registers
to control security and block protection options.
Provided the key enable (KEYEN) bit is 1, the 8-byte comparison key can be used to temporarily
disengage memory security. This key mechanism can be accessed only through user code running in secure
memory. (A security key cannot be entered directly through background debug commands.) This security
key can be disabled completely by programming the KEYEN bit to 0. If the security key is disabled, the
only way to disengage security is by mass erasing the Flash if needed (normally through the background
debug interface) and verifying that Flash is blank. To avoid returning to secure mode after the next reset,
program the security bits (SEC) to the unsecured state (1:0).
0x18AF CANRTSRL
TSR7 TSR6 TSR5 TSR4 TSR3 TSR2 TSR1 TSR0
0x18B0 CANTIDR0
ID10 ID9 ID8 ID7 ID6 ID5 ID4 ID3
0x18B1 CANTIDR1
ID2 ID1 ID0 RTR IDE — — —
0x18B2 CANTIDR2
— — — — — — — —
0x18B3 CANTIDR3
— — — — — — — —
0x18B4 –
0x18BB
CANTDSR0 –
CANTDSR7
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0x18BC CANTDLR
— — — — DLC3 DLC2 DLC1 DLC0
0x18BD CANTTBPR
PRIO7 PRIO6 PRIO5 PRIO4 PRIO3 PRIO2 PRIO1 PRIO0
1
SRR and IDE are both 1s.
2
The position of RTR differs between extended and standard identifier mapping.
Table 4-5. Nonvolatile Register Summary
Address Register Name Bit 7 654321Bit 0
0xFFAE
Reserved for
storage of FTRIM
0 0 0 0 0 0 0 FTRIM
0xFFAF
Res.forstorage of
MCGTRM
TRIM
0xFFB0–
0xFFB7
NVBACKKEY
8-Byte Comparison Key
0xFFB8–
0xFFBC
Reserved
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0xFFBD NVPROT
EPS FPS
0xFFBE Reserved
— — — — — — — —
0xFFBF NVOPT
KEYEN FNORED EPGMOD 0 0 0 SEC
Table 4-4. MSCAN Foreground Receive and Transmit Buffer Layouts — Extended Mapping Shown