Datasheet
Chapter 4 Memory
MC9S08DZ60 Series Data Sheet, Rev. 4
50 Freescale Semiconductor
Figure 4-4 shows the structure of receive and transmit buffers for extended identifier mapping. These
registers vary depending on whether standard or extended mapping is selected. See Chapter 12, “Freescale
Controller Area Network (S08MSCANV1),” for details on extended and standard identifier mapping.
0x1883 CANBTR1
SAMP TSEG22 TSEG21 TSEG20 TSEG13 TSEG12 TSEG11 TSEG10
0x1884 CANRFLG
WUPIF CSCIF RSTAT1 RSTAT0 TSTAT1 TSTAT0 OVRIF RXF
0x1885 CANRIER
WUPIE CSCIE RSTATE1 RSTATE0 TSTATE1 TSTATE0 OVRIE RXFIE
0x1886 CANTFLG
0 0 0 0 0 TXE2 TXE1 TXE0
0x1887 CANTIER
0 0 0 0 0 TXEIE2 TXEIE1 TXEIE0
0x1888 CANTARQ
0 0 0 0 0 ABTRQ2 ABTRQ1 ABTRQ0
0x1889 CANTAAK
0 0 0 0 0 ABTAK2 ABTAK1 ABTAK0
0x188A CANTBSEL
0 0 0 0 0 TX2 TX1 TX0
0x188B CANIDAC
0 0 IDAM1 IDAM0 0 IDHIT2 IDHIT1 IDHIT0
0x188C Reserved
0 0 0 0 0 0 0 0
0x188D CANMISC
0 0 0 0 0 0 0 BOHOLD
0x188E CANRXERR
RXERR7 RXERR6 RXERR5 RXERR4 RXERR3 RXERR2 RXERR1 RXERR0
0x188F CANTXERR
TXERR7 TXERR6 TXERR5 TXERR4 TXERR3 TXERR2 TXERR1 TXERR0
0x1890 –
0x1893
CANIDAR0 –
CANIDAR3
AC7 AC6 AC5 AC4 AC3 AC2 AC1 AC0
0x1894 –
0x1897
CANIDMR0 –
CANIDMR3
AM7 AM6 AM5 AM4 AM3 AM2 AM1 AM0
0x1898 –
0x189B
CANIDAR4 –
CANIDAR7
AC7 AC6 AC5 AC4 AC3 AC2 AC1 AC0
0x189C–
0x189F
CANIDMR4 –
CANIDMR7
AM7 AM6 AM5 AM4 AM3 AM2 AM1 AM0
0x18BE CANTTSRH
TSR15 TSR14 TSR13 TSR12 TSR11 TSR10 TSR9 TSR8
0x18BF CANTTSRL
TSR7 TSR6 TSR5 TSR4 TSR3 TSR2 TSR1 TSR0
0x18C0–
0x18FF
Reserved
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
This bit is reserved. User must write a 1 to this bit. Failing to do so may result in unexpected behavior.
Table 4-4. MSCAN Foreground Receive and Transmit Buffer Layouts — Extended Mapping Shown
0x18A0 CANRIDR0
ID28 ID27 ID26 ID25 ID24 ID23 ID22 ID21
0x18A1 CANRIDR1
ID20 ID19 ID18 SRR
(1)
IDE
(1)
ID17 ID16 ID15
0x18A2 CANRIDR2
ID14 ID13 ID12 ID11 ID10 ID9 ID8 ID7
0x18A3 CANRIDR3
ID6 ID5 ID4 ID3 ID2 ID1 ID0 RTR
2
0x18A4 –
0x18AB
CANRDSR0 –
CANRDSR7
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0x18AC CANRDLR
— — — — DLC3 DLC2 DLC1 DLC0
0x18AD Reserved
— — — — — — — —
0x18AE CANRTSRH
TSR15 TSR14 TSR13 TSR12 TSR11 TSR10 TSR9 TSR8
Table 4-3. High-Page Register Summary (Sheet 3 of 3)
Address Register Name Bit 7 654321Bit 0