Datasheet

Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor 237
Read: Anytime
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1), except bits IDHITx, which are
read-only
The IDHITx indicators are always related to the message in the foreground buffer (RxFG). When a
message gets shifted into the foreground buffer of the receiver FIFO the indicators are updated as well.
12.3.12 MSCAN Miscellaneous Register (CANMISC)
This register provides additional features.
Table 12-16. CANIDAC Register Field Descriptions
Field Description
5:4
IDAM[1:0]
Identifier Acceptance Mode — The CPU sets these flags to define the identifier acceptance filter organization
(see Section 12.5.3, “Identifier Acceptance Filter”). Table 12-17 summarizes the different settings. In filter closed
mode, no message is accepted such that the foreground buffer is never reloaded.
2:0
IDHIT[2:0]
Identifier Acceptance Hit Indicator — The MSCAN sets these flags to indicate an identifier acceptance hit (see
Section 12.5.3, “Identifier Acceptance Filter”). Table 12-18 summarizes the different settings.
Table 12-17. Identifier Acceptance Mode Settings
IDAM1 IDAM0 Identifier Acceptance Mode
0 0 Two 32-bit acceptance filters
0 1 Four 16-bit acceptance filters
1 0 Eight 8-bit acceptance filters
1 1 Filter closed
Table 12-18. Identifier Acceptance Hit Indication
IDHIT2 IDHIT1 IDHIT0 Identifier Acceptance Hit
0 0 0 Filter 0 hit
0 0 1 Filter 1 hit
0 1 0 Filter 2 hit
0 1 1 Filter 3 hit
1 0 0 Filter 4 hit
1 0 1 Filter 5 hit
1 1 0 Filter 6 hit
1 1 1 Filter 7 hit