Datasheet

Chapter 11 Inter-Integrated Circuit (S08IICV2)
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor 203
Refer to the direct-page register summary in the memory chapter of this document for the absolute address
assignments for all IIC registers. This section refers to registers and control bits only by their names. A
Freescale-provided equate or header file is used to translate these names into the appropriate absolute
addresses.
11.3.1 IIC Address Register (IICA)
11.3.2 IIC Frequency Divider Register (IICF)
76543210
R
AD7 AD6 AD5 AD4 AD3 AD2 AD1
0
W
Reset 00000000
= Unimplemented or Reserved
Figure 11-3. IIC Address Register (IICA)
Table 11-1. IICA Field Descriptions
Field Description
7–1
AD[7:1]
Slave Address. The AD[7:1] field contains the slave address to be used by the IIC module. This field is used on
the 7-bit address scheme and the lower seven bits of the 10-bit address scheme.
76543210
R
MULT ICR
W
Reset 00000000
Figure 11-4. IIC Frequency Divider Register (IICF)