Datasheet

PRTR5V0U4D All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 5 March 2012 7 of 10
NXP Semiconductors
PRTR5V0U4D
Ultra low capacitance quadruple rail-to-rail ESD protection
12. Revision history
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PRTR5V0U4D v.2 20120305 Product data sheet - PRTR5V0U4D v.1
Modifications:
• Section 1 “Product profile”: reshaped
• Section 1.4 “Quick reference data”: added
• Section 2: updated
• Section 4 “Marking”: added
• Section 5 “Limiting values”: reshaped and updated; junction temperature T
j
added; Table 6,
Table 7
and Figure 1 added
• Section 6 “Characteristics”: reshaped; I
LR
redefined to I
RM
• Section 8 “Test information”: added
• Figure 3: replaced by minimized outline drawing
• Section 10 “Packing information”: added
• Section 11 “Soldering”: added
• Section 13 “Legal information”: updated
PRTR5V0U4D v.1 20080111 Product data sheet - -