Datasheet

Philips Semiconductors
PCF8563
Real time clock/calendar
Product data Rev. 04 — 12 March 2004 15 of 30
9397 750 12999
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9.5.2 Clock/calendar read/write cycles
The I
2
C-bus configuration for the different PCF8563 read and write cycles is shown in
Figure 13, Figure 14 and Figure 15. The word address is a 4-bit value that defines
which register is to be accessed next. The upper four bits of the word address are not
used.
Fig 13. Master transmits to slave receiver (write mode).
S 0ASLAVE ADDRESS WORD ADDRESS A ADATA P
acknowledgement
from slave
acknowledgement
from slave
acknowledgement
from slave
R/W
auto increment
memory word address
MBD822
n bytes
Fig 14. Master reads after setting word address (write word address; read data).
S 0ASLAVE ADDRESS WORD ADDRESS A A
SLAVE ADDRESS
acknowledgement
from slave
acknowledgement
from slave
acknowledgement
from slave
R/W
acknowledgement
from master
A
DATA
auto increment
memory word address
MCE172
P
no acknowledgement
from master
1DATA
auto increment
memory word address
last byte
R/W
S1
n bytes
at this moment master transmitter
becomes master receiver and
PCA8565 slave receiver
becomes slave transmitter
Fig 15. Master reads slave immediately after first byte (read mode).
handbook, full pagewidth
S
1A
SLAVE ADDRESS DATA
A1DATA
acknowledgement
from slave
acknowledgement
from master
no acknowledgement
from master
R/W
auto increment
word address
MGL665
auto increment
word address
n bytes last byte
P