Datasheet

PCF85102C-2
256 × 8-bit CMOS EEPROM with I
2
C-bus interface
Rev. 04 — 22 October 2004 Product data
1. Description
The PCF85102C-2 is a floating gate Electrically Erasable Programmable Read Only
Memory (EEPROM) with 2 kbits (256 × 8-bit) non-volatile storage. By using an
internal redundant storage code, it is fault tolerant to single bit errors. This feature
dramatically increases the reliability compared to conventional EEPROMs. Power
consumption is low due to the full CMOS technology used. The programming voltage
is generated on-chip, using a voltage multiplier.
Data bytes are received and transmitted via the serial I
2
C-bus. Up to eight
PCF85102C-2 devices may be connected to the I
2
C-bus. Chip select is accomplished
by three address inputs (A0, A1 and A2).
2. Features
Low power CMOS:
2.0 mA maximum operating current
maximum standby current 10 µA (at 6.0 V), typical 4 µA
Non-volatile storage of 2 kbits organized as 256 × 8-bit
Single supply with full operation down to 2.5 V
On-chip voltage multiplier
Serial input/output I
2
C-bus
Write operations:
byte write mode
8-byte page write mode (minimizes total write time per byte)
Read operations:
sequential read
random read
Internal timer for writing (no external components)
Internal power-on reset
0 kHz to 100 kHz clock frequency
High reliability by using a redundant storage code
Endurance: 1,000,000 Erase/Write (E/W) cycles at T
amb
=22°C
10 years non-volatile data retention time
Pin and address compatible to: PCF8570, PCF8571, PCF8572, PCA8581,
PCF8582
Pin compatible (with a different address) to PCF85103
ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101

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