Datasheet

Philips Semiconductors Product specification
82B715I
2
C bus extender
2001 Mar 06
7
R3R2
LDA SDA
I
2
C
PROPOSED BUS EXPANSION
5V
0V
3nF
R1
I
2
C
I
2
C
SDA
SDA
EXISTING
GND
V
CC
EFFECTIVE CAPACITANCE
NEAR I
2
C DEVICES
EFFECTIVE CAPACITANCE
BUFFERED LINE
EFFECTIVE CAPACITANCE
REMOTE I
2
C DEVICES
2 × I
2
C Devices 20pF
Strays 20pF
82B715 Buffer 10pF
–––––
TOTAL CAP. 50pF
Wiring Cap. 3000pF
–––––
TOTAL CAP. 3000pF
1 × I
2
C Devices 10pF
Strays 10pF
82B715 Buffer 10pF
–––––
TOTAL CAP. 30pF
I
2
C pull-up Buffered Bus pull-up I
2
C pull-up
R1 +
1m sec
50pF
+ 20KW R2 +
1m sec
3000pF
+ 333W R3 +
1m sec
30pF
+ 33KW
AS AN ADDITION TO AN EXISTING SYSTEM * :
R2Ȁ+
R2 0.1R3
R2 ) 0.1R3
+ 300W
R3 not required since
buffer always connected
R1 = 20KΩ
FOR A PERMANENT SYSTEM * :
R2Ȁ+
1
1
0.1R1
)
1
0.1R2
)
1
0.1R3
+ 262W
R3 not required since
buffer always connected
R1 not required since
buffer always connected
* NOTE:
R1, R2 and R3 are calculated from the capacitive loading and a 1µsec time constant on each bus node. For an addition to an existing
system, R2’ (the new value for R2) is shown as being calculated from the parallel combination of R2 and the scaled value of R3;
while for a permanent system R2, and scaled values of R1 and R3 have been used. Note that this example has used scaled resistor
values and combined the node and cable capacitances.
(5 * 0.4)V
260W
+ 17.6mA t 30mA
CHECK FOR MAXIMUM PULL-UP CURRENT:
SU00294
Figure 4. Typical Loading Calculation: I
2
C Bus with 82B715