Datasheet

NXP Semiconductors

UM11121

LPCXpresso51U68

UM11121

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User manual

Rev 1.1 — 27 April 27, 2018

10 of 22

3.2 Starting a debug session using an external Debug Probe

Code running on the LPC51U68 target can be debugged using an external Debug Probe

that conforms to the standard ARM debug connector. To use an external Debug Probe

connect the probe to the SWD connector (P1) and connect power via the micro USB

connector J5.

Note: The Debug link connector J7 must be left unconnected so that the Link2 Debug

Probe is left unpowered and does not contend with the SWD interface signals from the

external Debug Probe.

4. LPC51U68 Serial ports

By default, the LPC51U68 UART0 is connected to the FTDI header at J5. This can be

used for ISP booting or sending debug messages out to a host computer via a suitable

cable. The LPC51U68 UART0 can also be connected through a virtual communication

port (VCOM) UART bridge Link2 function to a host computer connected to the J6 USB

Link2.

The factory default CMSIS-DAP Link2 image includes UART bridge functionality (VCOM

support), and this firmware is also available with the LPCScrypt utility, available at

http://www.nxp.com/lpcutilities. When running this firmware, the default source of data to

the LPC51U68 RXD is the FTDI header. Once the Link2 receives any data via the VCOM

port of a host computer it will set P2_2 low to select the Link2 UART0 data to the

LPC51U68. In order to reset this so the FTDI connection can be used it is necessary to

power cycle the board.

4.1 P3 FTDI header

The FTDI header P3 mates with FTDI cable TTL-232R-3V3. P3 interfaces the LPC51U68

UART0 to a Host PC virtual serial port. The location of P3 is shown in Fig 3. The pin out

and a description of the signals at P3 are listed in Table 2.